target: rename cortex_m3 to cortex_m
[openocd.git] / tcl / target / str750.cfg
index 7d9f0343d105dfd9117f0382664fdc9711175a1e..e9167279decb8aaf0d2fb8bdfc5c502e79f29bf7 100644 (file)
@@ -1,21 +1,21 @@
 #STR750 CPU
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME str750
+   set _CHIPNAME str750
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
 if { [info exists CPUTAPID] } {
-   set  _CPUTAPID $CPUTAPID
+   set _CPUTAPID $CPUTAPID
 } else {
-   set  _CPUTAPID 0x4f1f0041
+   set _CPUTAPID 0x4f1f0041
 }
 
 # jtag speed
@@ -35,10 +35,11 @@ jtag_ntrst_delay 500
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
 
-$_TARGETNAME configure -event reset-start  { adapter_khz 10 }
+$_TARGETNAME configure -event reset-start { adapter_khz 10 }
 $_TARGETNAME configure -event reset-init {
        adapter_khz 3000
 
+       init_smi
 # Because the hardware cannot be interrogated for the protection state
 # of sectors, initialize all the sectors to be unprotected. The initial
 # state is reflected by the driver, too.
@@ -58,3 +59,14 @@ flash bank $_FLASHNAME str7x 0x20000000 0x00040000 0 0 $_TARGETNAME STR75x
 set _FLASHNAME $_CHIPNAME.flash1
 flash bank $_FLASHNAME str7x 0x200C0000 0x00004000 0 0 $_TARGETNAME STR75x
 
+# Serial NOR on SMI CS0.
+set _FLASHNAME $_CHIPNAME.snor
+flash bank $_FLASHNAME stmsmi 0x80000000 0 0 0 $_TARGETNAME
+
+source [find mem_helper.tcl]
+
+proc init_smi {} {
+       mmw 0x60000030 0x01000000 0x00000000; # enable clock for GPIO regs
+       mmw 0xffffe420 0x00000001 0x00000000; # set SMI_EN bit
+       mmw 0x90000000 0x00000001 0x00000000; # set BLOCK_EN_1
+}

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