X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=doc%2Fopenocd.texi;h=0e197c3ca2acb18af60739ffd3a24b30d4243ecd;hp=f00af7fb8500fbe19eb48b2f7949bbf73949cd84;hb=ee5ecb8a299fa22f7a7882adebf2a74263fc909f;hpb=a09a75653dbe7ad99da6349285ab6622b80fdc15 diff --git a/doc/openocd.texi b/doc/openocd.texi index f00af7fb85..0e197c3ca2 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -170,7 +170,7 @@ controllers (LPC3180, Orion, S3C24xx, more) is included. The OpenOCD web site provides the latest public news from the community: -@uref{http://openocd.sourceforge.net/} +@uref{http://openocd.org/} @section Latest User's Guide: @@ -178,11 +178,11 @@ The user's guide you are now reading may not be the latest one available. A version for more recent code may be available. Its HTML form is published regularly at: -@uref{http://openocd.sourceforge.net/doc/html/index.html} +@uref{http://openocd.org/doc/html/index.html} PDF form is likewise published at: -@uref{http://openocd.sourceforge.net/doc/pdf/openocd.pdf} +@uref{http://openocd.org/doc/pdf/openocd.pdf} @section OpenOCD User's Forum @@ -256,7 +256,7 @@ providing a Doxygen reference manual. This document contains more technical information about the software internals, development processes, and similar documentation: -@uref{http://openocd.sourceforge.net/doc/doxygen/html/index.html} +@uref{http://openocd.org/doc/doxygen/html/index.html} This document is a work-in-progress, but contributions would be welcome to fill in the gaps. All of the source files are provided in-tree, @@ -292,7 +292,7 @@ communication between developers: The OpenOCD Bug Tracker is hosted on SourceForge: -@uref{https://sourceforge.net/p/openocd/tickets/} +@uref{http://bugs.openocd.org/} @node Debug Adapter Hardware @@ -471,7 +471,7 @@ SWD and not JTAG, thus not supported. @itemize @bullet @item @b{Raisonance RLink} -@* Link: @url{http://www.mcu-raisonance.com/~rlink-debugger-programmer__microcontrollers__tool~tool__T018:4cn9ziz4bnx6.html} +@* Link: @url{http://www.mcu-raisonance.com/~rlink-debugger-programmer__@/microcontrollers__tool~tool__T018:4cn9ziz4bnx6.html} @item @b{STM32 Primer} @* Link: @url{http://www.stm32circle.com/resources/stm32primer.php} @item @b{STM32 Primer2} @@ -735,7 +735,7 @@ If all goes well you'll see output something like @example Open On-Chip Debugger 0.4.0 (2010-01-14-15:06) For bug reports, read - http://openocd.sourceforge.net/doc/doxygen/bugs.html + http://openocd.org/doc/doxygen/bugs.html Info : JTAG tap: lm3s.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) @end example @@ -1296,65 +1296,17 @@ including developers and integrators of OpenOCD and any user who needs to get a new board working smoothly. It provides guidelines for creating those files. -You should find the following directories under @t{$(INSTALLDIR)/scripts}, -with files including the ones listed here. -Use them as-is where you can; or as models for new files. +You should find the following directories under +@t{$(INSTALLDIR)/scripts}, with config files maintained upstream. Use +them as-is where you can; or as models for new files. @itemize @bullet @item @file{interface} ... -These are for debug adapters. -Files that configure JTAG adapters go here. -@example -$ ls interface -R -interface/: -altera-usb-blaster.cfg hilscher_nxhx50_re.cfg openocd-usb-hs.cfg -arm-jtag-ew.cfg hitex_str9-comstick.cfg openrd.cfg -at91rm9200.cfg icebear.cfg osbdm.cfg -axm0432.cfg jlink.cfg parport.cfg -busblaster.cfg jtagkey2.cfg parport_dlc5.cfg -buspirate.cfg jtagkey2p.cfg redbee-econotag.cfg -calao-usb-a9260-c01.cfg jtagkey.cfg redbee-usb.cfg -calao-usb-a9260-c02.cfg jtagkey-tiny.cfg rlink.cfg -calao-usb-a9260.cfg jtag-lock-pick_tiny_2.cfg sheevaplug.cfg -chameleon.cfg kt-link.cfg signalyzer.cfg -cortino.cfg lisa-l.cfg signalyzer-h2.cfg -digilent-hs1.cfg luminary.cfg signalyzer-h4.cfg -dlp-usb1232h.cfg luminary-icdi.cfg signalyzer-lite.cfg -dummy.cfg luminary-lm3s811.cfg stlink-v1.cfg -estick.cfg minimodule.cfg stlink-v2.cfg -flashlink.cfg neodb.cfg stm32-stick.cfg -flossjtag.cfg ngxtech.cfg sysfsgpio-raspberrypi.cfg -flossjtag-noeeprom.cfg olimex-arm-usb-ocd.cfg ti-icdi.cfg -flyswatter2.cfg olimex-arm-usb-ocd-h.cfg turtelizer2.cfg -flyswatter.cfg olimex-arm-usb-tiny-h.cfg ulink.cfg -ftdi olimex-jtag-tiny.cfg usb-jtag.cfg -hilscher_nxhx10_etm.cfg oocdlink.cfg usbprog.cfg -hilscher_nxhx500_etm.cfg opendous.cfg vpaclink.cfg -hilscher_nxhx500_re.cfg opendous_ftdi.cfg vsllink.cfg -hilscher_nxhx50_etm.cfg openocd-usb.cfg xds100v2.cfg - -interface/ftdi: -axm0432.cfg hitex_str9-comstick.cfg olimex-jtag-tiny.cfg -calao-usb-a9260-c01.cfg icebear.cfg oocdlink.cfg -calao-usb-a9260-c02.cfg jtagkey2.cfg opendous_ftdi.cfg -cortino.cfg jtagkey2p.cfg openocd-usb.cfg -dlp-usb1232h.cfg jtagkey.cfg openocd-usb-hs.cfg -dp_busblaster.cfg jtag-lock-pick_tiny_2.cfg openrd.cfg -flossjtag.cfg kt-link.cfg redbee-econotag.cfg -flossjtag-noeeprom.cfg lisa-l.cfg redbee-usb.cfg -flyswatter2.cfg luminary.cfg sheevaplug.cfg -flyswatter.cfg luminary-icdi.cfg signalyzer.cfg -gw16042.cfg luminary-lm3s811.cfg signalyzer-lite.cfg -hilscher_nxhx10_etm.cfg minimodule.cfg stm32-stick.cfg -hilscher_nxhx500_etm.cfg neodb.cfg turtelizer2-revB.cfg -hilscher_nxhx500_re.cfg ngxtech.cfg turtelizer2-revC.cfg -hilscher_nxhx50_etm.cfg olimex-arm-usb-ocd.cfg vpaclink.cfg -hilscher_nxhx50_re.cfg olimex-arm-usb-ocd-h.cfg xds100v2.cfg -hitex_lpc1768stick.cfg olimex-arm-usb-tiny-h.cfg -$ -@end example +These are for debug adapters. Files that specify configuration to use +specific JTAG, SWD and other adapters go here. @item @file{board} ... -think Circuit Board, PWA, PCB, they go by many names. Board files +Think Circuit Board, PWA, PCB, they go by many names. Board files contain initialization items that are specific to a board. + They reuse target configuration files, since the same microprocessor chips are used on many boards, but support for external parts varies widely. For @@ -1363,169 +1315,13 @@ of external flash and what address it uses. Any initialization sequence to enable that external flash or SDRAM should be found in the board file. Boards may also contain multiple targets: two CPUs; or a CPU and an FPGA. -@example -$ ls board -actux3.cfg lpc1850_spifi_generic.cfg -am3517evm.cfg lpc4350_spifi_generic.cfg -arm_evaluator7t.cfg lubbock.cfg -at91cap7a-stk-sdram.cfg mcb1700.cfg -at91eb40a.cfg microchip_explorer16.cfg -at91rm9200-dk.cfg mini2440.cfg -at91rm9200-ek.cfg mini6410.cfg -at91sam9261-ek.cfg netgear-dg834v3.cfg -at91sam9263-ek.cfg olimex_LPC2378STK.cfg -at91sam9g20-ek.cfg olimex_lpc_h2148.cfg -atmel_at91sam7s-ek.cfg olimex_sam7_ex256.cfg -atmel_at91sam9260-ek.cfg olimex_sam9_l9260.cfg -atmel_at91sam9rl-ek.cfg olimex_stm32_h103.cfg -atmel_sam3n_ek.cfg olimex_stm32_h107.cfg -atmel_sam3s_ek.cfg olimex_stm32_p107.cfg -atmel_sam3u_ek.cfg omap2420_h4.cfg -atmel_sam3x_ek.cfg open-bldc.cfg -atmel_sam4s_ek.cfg openrd.cfg -balloon3-cpu.cfg osk5912.cfg -colibri.cfg phone_se_j100i.cfg -crossbow_tech_imote2.cfg phytec_lpc3250.cfg -csb337.cfg pic-p32mx.cfg -csb732.cfg propox_mmnet1001.cfg -da850evm.cfg pxa255_sst.cfg -digi_connectcore_wi-9c.cfg redbee.cfg -diolan_lpc4350-db1.cfg rsc-w910.cfg -dm355evm.cfg sheevaplug.cfg -dm365evm.cfg smdk6410.cfg -dm6446evm.cfg spear300evb.cfg -efikamx.cfg spear300evb_mod.cfg -eir.cfg spear310evb20.cfg -ek-lm3s1968.cfg spear310evb20_mod.cfg -ek-lm3s3748.cfg spear320cpu.cfg -ek-lm3s6965.cfg spear320cpu_mod.cfg -ek-lm3s811.cfg steval_pcc010.cfg -ek-lm3s811-revb.cfg stm320518_eval_stlink.cfg -ek-lm3s8962.cfg stm32100b_eval.cfg -ek-lm3s9b9x.cfg stm3210b_eval.cfg -ek-lm3s9d92.cfg stm3210c_eval.cfg -ek-lm4f120xl.cfg stm3210e_eval.cfg -ek-lm4f232.cfg stm3220g_eval.cfg -embedded-artists_lpc2478-32.cfg stm3220g_eval_stlink.cfg -ethernut3.cfg stm3241g_eval.cfg -glyn_tonga2.cfg stm3241g_eval_stlink.cfg -hammer.cfg stm32f0discovery.cfg -hilscher_nxdb500sys.cfg stm32f3discovery.cfg -hilscher_nxeb500hmi.cfg stm32f4discovery.cfg -hilscher_nxhx10.cfg stm32ldiscovery.cfg -hilscher_nxhx500.cfg stm32vldiscovery.cfg -hilscher_nxhx50.cfg str910-eval.cfg -hilscher_nxsb100.cfg telo.cfg -hitex_lpc1768stick.cfg ti_am335xevm.cfg -hitex_lpc2929.cfg ti_beagleboard.cfg -hitex_stm32-performancestick.cfg ti_beagleboard_xm.cfg -hitex_str9-comstick.cfg ti_beaglebone.cfg -iar_lpc1768.cfg ti_blaze.cfg -iar_str912_sk.cfg ti_pandaboard.cfg -icnova_imx53_sodimm.cfg ti_pandaboard_es.cfg -icnova_sam9g45_sodimm.cfg topas910.cfg -imx27ads.cfg topasa900.cfg -imx27lnst.cfg twr-k60f120m.cfg -imx28evk.cfg twr-k60n512.cfg -imx31pdk.cfg tx25_stk5.cfg -imx35pdk.cfg tx27_stk5.cfg -imx53loco.cfg unknown_at91sam9260.cfg -keil_mcb1700.cfg uptech_2410.cfg -keil_mcb2140.cfg verdex.cfg -kwikstik.cfg voipac.cfg -linksys_nslu2.cfg voltcraft_dso-3062c.cfg -lisa-l.cfg x300t.cfg -logicpd_imx27.cfg zy1000.cfg -$ -@end example @item @file{target} ... -think chip. The ``target'' directory represents the JTAG TAPs +Think chip. The ``target'' directory represents the JTAG TAPs on a chip which OpenOCD should control, not a board. Two common types of targets are ARM chips and FPGA or CPLD chips. When a chip has multiple TAPs (maybe it has both ARM and DSP cores), the target config file defines all of them. -@example -$ ls target -aduc702x.cfg lpc1764.cfg -am335x.cfg lpc1765.cfg -amdm37x.cfg lpc1766.cfg -ar71xx.cfg lpc1767.cfg -at32ap7000.cfg lpc1768.cfg -at91r40008.cfg lpc1769.cfg -at91rm9200.cfg lpc1788.cfg -at91sam3ax_4x.cfg lpc17xx.cfg -at91sam3ax_8x.cfg lpc1850.cfg -at91sam3ax_xx.cfg lpc2103.cfg -at91sam3nXX.cfg lpc2124.cfg -at91sam3sXX.cfg lpc2129.cfg -at91sam3u1c.cfg lpc2148.cfg -at91sam3u1e.cfg lpc2294.cfg -at91sam3u2c.cfg lpc2378.cfg -at91sam3u2e.cfg lpc2460.cfg -at91sam3u4c.cfg lpc2478.cfg -at91sam3u4e.cfg lpc2900.cfg -at91sam3uxx.cfg lpc2xxx.cfg -at91sam3XXX.cfg lpc3131.cfg -at91sam4sd32x.cfg lpc3250.cfg -at91sam4sXX.cfg lpc4350.cfg -at91sam4XXX.cfg lpc4350.cfg.orig -at91sam7se512.cfg mc13224v.cfg -at91sam7sx.cfg nuc910.cfg -at91sam7x256.cfg omap2420.cfg -at91sam7x512.cfg omap3530.cfg -at91sam9260.cfg omap4430.cfg -at91sam9260_ext_RAM_ext_flash.cfg omap4460.cfg -at91sam9261.cfg omap5912.cfg -at91sam9263.cfg omapl138.cfg -at91sam9.cfg pic32mx.cfg -at91sam9g10.cfg pxa255.cfg -at91sam9g20.cfg pxa270.cfg -at91sam9g45.cfg pxa3xx.cfg -at91sam9rl.cfg readme.txt -atmega128.cfg samsung_s3c2410.cfg -avr32.cfg samsung_s3c2440.cfg -c100.cfg samsung_s3c2450.cfg -c100config.tcl samsung_s3c4510.cfg -c100helper.tcl samsung_s3c6410.cfg -c100regs.tcl sharp_lh79532.cfg -cs351x.cfg sim3x.cfg -davinci.cfg smp8634.cfg -dragonite.cfg spear3xx.cfg -dsp56321.cfg stellaris.cfg -dsp568013.cfg stellaris_icdi.cfg -dsp568037.cfg stm32f0x_stlink.cfg -efm32_stlink.cfg stm32f1x.cfg -epc9301.cfg stm32f1x_stlink.cfg -faux.cfg stm32f2x.cfg -feroceon.cfg stm32f2x_stlink.cfg -fm3.cfg stm32f3x.cfg -hilscher_netx10.cfg stm32f3x_stlink.cfg -hilscher_netx500.cfg stm32f4x.cfg -hilscher_netx50.cfg stm32f4x_stlink.cfg -icepick.cfg stm32l.cfg -imx21.cfg stm32lx_dual_bank.cfg -imx25.cfg stm32lx_stlink.cfg -imx27.cfg stm32_stlink.cfg -imx28.cfg stm32w108_stlink.cfg -imx31.cfg stm32xl.cfg -imx35.cfg str710.cfg -imx51.cfg str730.cfg -imx53.cfg str750.cfg -imx6.cfg str912.cfg -imx.cfg swj-dp.tcl -is5114.cfg test_reset_syntax_error.cfg -ixp42x.cfg test_syntax_error.cfg -k40.cfg ti-ar7.cfg -k60.cfg ti_calypso.cfg -lpc1751.cfg ti_dm355.cfg -lpc1752.cfg ti_dm365.cfg -lpc1754.cfg ti_dm6446.cfg -lpc1756.cfg tmpa900.cfg -lpc1758.cfg tmpa910.cfg -lpc1759.cfg u8500.cfg -lpc1763.cfg -@end example @item @emph{more} ... browse for other library files which may be useful. For example, there are various generic and CPU-specific utilities. @end itemize @@ -3088,6 +2884,7 @@ which are not currently documented here. @end quotation @end deffn +@anchor{hla_interface} @deffn {Interface Driver} {hla} This is a driver that supports multiple High Level Adapters. This type of adapter does not expose some of the lower level api's @@ -3119,13 +2916,6 @@ The vendor ID and product ID of the device. Execute a custom adapter-specific command. The @var{command} string is passed as is to the underlying adapter layout handler. @end deffn - -@deffn {Config Command} {trace} source_clock_hz [output_file_path] -Enable SWO tracing (if supported). The source clock rate for the -trace port must be specified, this is typically the CPU clock rate. If -the optional output file is specified then raw trace data is appended -to the file, and the file is created if it does not exist. -@end deffn @end deffn @deffn {Interface Driver} {opendous} @@ -3177,11 +2967,20 @@ displays the names of the transports supported by this version of OpenOCD. @end deffn -@deffn Command {transport select} transport_name +@deffn Command {transport select} @option{transport_name} Select which of the supported transports to use in this OpenOCD session. -The transport must be supported by the debug adapter hardware and by the -version of OpenOCD you are using (including the adapter's driver). -No arguments: returns name of session's selected transport. + +When invoked with @option{transport_name}, attempts to select the named +transport. The transport must be supported by the debug adapter +hardware and by the version of OpenOCD you are using (including the +adapter's driver). + +If no transport has been selected and no @option{transport_name} is +provided, @command{transport select} auto-selects the first transport +supported by the debug adapter. + +@command{transport select} always returns the name of the session's selected +transport, if any. @end deffn @subsection JTAG Transport @@ -3192,6 +2991,12 @@ JTAG transports expose a chain of one or more Test Access Points (TAPs), each of which must be explicitly declared. JTAG supports both debugging and boundary scan testing. Flash programming support is built on top of debug support. + +JTAG transport is selected with the command @command{transport select +jtag}. Unless your adapter uses @ref{hla_interface,the hla interface +driver}, in which case the command is @command{transport select +hla_jtag}. + @subsection SWD Transport @cindex SWD @cindex Serial Wire Debug @@ -3201,6 +3006,12 @@ Debug Access Point (DAP, which must be explicitly declared. SWD is debug-oriented, and does not support boundary scan testing. Flash programming support is built on top of debug support. (Some processors support both JTAG and SWD.) + +SWD transport is selected with the command @command{transport select +swd}. Unless your adapter uses @ref{hla_interface,the hla interface +driver}, in which case the command is @command{transport select +hla_swd}. + @deffn Command {swd newdap} ... Declares a single DAP which uses SWD transport. Parameters are currently the same as "jtag newtap" but this is @@ -3212,11 +3023,6 @@ Wire Control Register (WCR). No parameters: displays current settings. @end deffn -@subsection CMSIS-DAP Transport -@cindex CMSIS-DAP -CMSIS-DAP is an ARM-specific transport that is used to connect to -compilant debuggers. - @subsection SPI Transport @cindex SPI @cindex Serial Peripheral Interface @@ -4208,14 +4014,14 @@ not a CPU type. It is based on the ARMv5 architecture. @item @code{openrisc} -- this is an OpenRISC 1000 core. The current implementation supports three JTAG TAP cores: @itemize @minus -@item @code{OpenCores TAP} (See: @emph{http://opencores.org/project,jtag}) -@item @code{Altera Virtual JTAG TAP} (See: @emph{http://www.altera.com/literature/ug/ug_virtualjtag.pdf}) -@item @code{Xilinx BSCAN_* virtual JTAG interface} (See: @emph{http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/spartan6_hdl.pdf}) +@item @code{OpenCores TAP} (See: @url{http://opencores.org/project,jtag}) +@item @code{Altera Virtual JTAG TAP} (See: @url{http://www.altera.com/literature/ug/ug_virtualjtag.pdf}) +@item @code{Xilinx BSCAN_* virtual JTAG interface} (See: @url{http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/spartan6_hdl.pdf}) @end itemize And two debug interfaces cores: @itemize @minus -@item @code{Advanced debug interface} (See: @emph{http://opencores.org/project,adv_debug_sys}) -@item @code{SoC Debug Interface} (See: @emph{http://opencores.org/project,dbg_interface}) +@item @code{Advanced debug interface} (See: @url{http://opencores.org/project,adv_debug_sys}) +@item @code{SoC Debug Interface} (See: @url{http://opencores.org/project,dbg_interface}) @end itemize @end itemize @end deffn @@ -4359,7 +4165,7 @@ The value should normally correspond to a static mapping for the @anchor{rtostype} @item @code{-rtos} @var{rtos_type} -- enable rtos support for target, @var{rtos_type} can be one of @option{auto}|@option{eCos}|@option{ThreadX}| -@option{FreeRTOS}|@option{linux}|@option{ChibiOS}|@option{embKernel} +@option{FreeRTOS}|@option{linux}|@option{ChibiOS}|@option{embKernel}|@option{mqx} @xref{gdbrtossupport,,RTOS Support}. @end itemize @@ -4539,7 +4345,8 @@ proc my_attach_proc @{ @} @{ mychip.cpu configure -event gdb-attach my_attach_proc mychip.cpu configure -event gdb-attach @{ echo "Reset..." - # To make flash probe and gdb load to flash work we need a reset init. + # To make flash probe and gdb load to flash work + # we need a reset init. reset init @} @end example @@ -5142,6 +4949,20 @@ Atmel include internal flash and use ARM's Cortex-M4 core. This driver uses the same cmd names/syntax as @xref{at91sam3}. @end deffn +@deffn {Flash Driver} at91sam4l +@cindex at91sam4l +All members of the AT91SAM4L microcontroller family from +Atmel include internal flash and use ARM's Cortex-M4 core. +This driver uses the same cmd names/syntax as @xref{at91sam3}. + +The AT91SAM4L driver adds some additional commands: +@deffn Command {at91sam4l smap_reset_deassert} +This command releases internal reset held by SMAP +and prepares reset vector catch in case of reset halt. +Command is used internally in event event reset-deassert-post. +@end deffn +@end deffn + @deffn {Flash Driver} at91sam7 All members of the AT91SAM7 microcontroller family from Atmel include internal flash and use ARM7TDMI cores. The driver automatically @@ -5610,7 +5431,8 @@ The @var{str7x} driver defines one mandatory parameter, @var{variant}, which is either @code{STR71x}, @code{STR73x} or @code{STR75x}. @example -flash bank $_FLASHNAME str7x 0x40000000 0x00040000 0 0 $_TARGETNAME STR71x +flash bank $_FLASHNAME str7x \ + 0x40000000 0x00040000 0 0 $_TARGETNAME STR71x @end example @deffn Command {str7x disable_jtag} bank @@ -5835,13 +5657,47 @@ works only for chips that do not have factory pre-programmed region 0 code. @end deffn +@end deffn + @deffn {Flash Driver} mrvlqspi This driver supports QSPI flash controller of Marvell's Wireless Microcontroller platform. The flash size is autodetected based on the table of known JEDEC IDs hardcoded in the OpenOCD sources. + +@example +flash bank $_FLASHNAME mrvlqspi 0x0 0 0 0 $_TARGETNAME 0x46010000 +@end example + @end deffn + +@deffn {Flash Driver} mdr +This drivers handles the integrated NOR flash on Milandr Cortex-M +based controllers. A known limitation is that the Info memory can't be +read or verified as it's not memory mapped. + +@example +flash bank mdr \ + 0 0 @var{type} @var{page_count} @var{sec_count} +@end example + +@itemize @bullet +@item @var{type} - 0 for main memory, 1 for info memory +@item @var{page_count} - total number of pages +@item @var{sec_count} - number of sector per page count +@end itemize + +Example usage: +@example +if @{ [info exists IMEMORY] && [string equal $IMEMORY true] @} @{ + flash bank $@{_CHIPNAME@}_info.flash mdr 0x00000000 0x01000 \ + 0 0 $_TARGETNAME 1 1 4 +@} else @{ + flash bank $_CHIPNAME.flash mdr 0x00000000 0x20000 \ + 0 0 $_TARGETNAME 0 32 4 +@} +@end example @end deffn @section mFlash @@ -6476,8 +6332,10 @@ Useful in connection with script files (@command{script} command and @command{target_name} configuration). @end deffn -@deffn Command shutdown -Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, other). +@deffn Command shutdown [@option{error}] +Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, +other). If option @option{error} is used, OpenOCD will return a +non-zero exit code to the parent process. @end deffn @anchor{debuglevel} @@ -6785,7 +6643,8 @@ In addition the following arguments may be specifed: proc load_image_bin @{fname foffset address length @} @{ # Load data from fname filename at foffset offset to # target at address. Load at most length bytes. - load_image $fname [expr $address - $foffset] bin $address $length + load_image $fname [expr $address - $foffset] bin \ + $address $length @} @end example @end deffn @@ -7710,9 +7569,13 @@ $ stty -F /dev/ttyUSB1 38400 (FT2232H's base frequency is 60MHz, spd_cust allows to alias 38400 baud with our custom divisor to get 12MHz) @item @code{itmdump -f /dev/ttyUSB1 -d1} -@item @code{openocd -f interface/stlink-v2-1.cfg -c "transport select -hla_swd" -f target/stm32l1.cfg -c "tpiu config external uart off -24000000 12000000"} +@item OpenOCD invocation line: +@example +openocd -f interface/stlink-v2-1.cfg \ + -c "transport select hla_swd" \ + -f target/stm32l1.cfg \ + -c "tpiu config external uart off 24000000 12000000" +@end example @end enumerate @end deffn @@ -8575,6 +8438,7 @@ Currently supported rtos's include: @item @option{linux} @item @option{ChibiOS} @item @option{embKernel} +@item @option{mqx} @end itemize @quotation Note @@ -8588,9 +8452,11 @@ Cyg_Thread::thread_list, Cyg_Scheduler_Base::current_thread. @item ThreadX symbols _tx_thread_current_ptr, _tx_thread_created_ptr, _tx_thread_created_count. @item FreeRTOS symbols +@raggedright pxCurrentTCB, pxReadyTasksLists, xDelayedTaskList1, xDelayedTaskList2, pxDelayedTaskList, pxOverflowDelayedTaskList, xPendingReadyList, -xTasksWaitingTermination, xSuspendedTaskList, uxCurrentNumberOfTasks, uxTopUsedPriority. +uxCurrentNumberOfTasks, uxTopUsedPriority. +@end raggedright @item linux symbols init_task. @item ChibiOS symbols @@ -8598,11 +8464,20 @@ rlist, ch_debug, chSysInit. @item embKernel symbols Rtos::sCurrentTask, Rtos::sListReady, Rtos::sListSleep, Rtos::sListSuspended, Rtos::sMaxPriorities, Rtos::sCurrentTaskCount. +@item mqx symbols +_mqx_kernel_data, MQX_init_struct. @end table For most RTOS supported the above symbols will be exported by default. However for -some, eg. FreeRTOS @option{xTasksWaitingTermination} is only exported -if @option{INCLUDE_vTaskDelete} is defined during the build. +some, eg. FreeRTOS, extra steps must be taken. + +These RTOSes may require additional OpenOCD-specific file to be linked +along with the project: + +@table @code +@item FreeRTOS +contrib/rtos-helpers/FreeRTOS-openocd.c +@end table @node Tcl Scripting API @chapter Tcl Scripting API