X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=doc%2Fopenocd.texi;h=7bf0fe98b97e548ff26f7292870daabf5827deb7;hp=33812499ac4dbff6cbbb4e0234469468ae5ee297;hb=b5a24386e49ca643ab750543e3818172d37fbc54;hpb=84291d02692fe69d75ccd3ce11dea4522ad988a0

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 33812499ac..7bf0fe98b9 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -265,7 +265,7 @@ listed in the Doxyfile configuration at the top of the source tree.
 All changes in the OpenOCD Git repository go through the web-based Gerrit
 Code Review System:
 
-@uref{http://openocd.zylin.com/}
+@uref{https://review.openocd.org/}
 
 After a one-time registration and repository setup, anyone can push commits
 from their local Git repository directly into Gerrit.
@@ -3131,6 +3131,26 @@ Specifies the serial number of the adapter.
 @deffn {Config Command} {st-link vid_pid} [vid pid]+
 Pairs of vendor IDs and product IDs of the device.
 @end deffn
+
+@deffn {Command} {st-link cmd} rx_n (tx_byte)+
+Sends an arbitrary command composed by the sequence of bytes @var{tx_byte}
+and receives @var{rx_n} bytes.
+
+For example, the command to read the target's supply voltage is one byte 0xf7 followed
+by 15 bytes zero. It returns 8 bytes, where the first 4 bytes represent the ADC sampling
+of the reference voltage 1.2V and the last 4 bytes represent the ADC sampling of half
+the target's supply voltage.
+@example
+> st-link cmd 8 0xf7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0xf1 0x05 0x00 0x00 0x0b 0x08 0x00 0x00
+@end example
+The result can be converted to Volts (ignoring the most significant bytes, always zero)
+@example
+> set a [st-link cmd 8 0xf7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0]
+> echo [expr 2*1.2*([lindex $a 4]+256*[lindex $a 5])/([lindex $a 0]+256*[lindex $a 1])]
+3.24891518738
+@end example
+@end deffn
 @end deffn
 
 @deffn {Interface Driver} {opendous}
@@ -6777,6 +6797,17 @@ Show information about flash driver.
 
 @end deffn
 
+@deffn {Flash Driver} {npcx}
+All versions of the NPCX microcontroller families from Nuvoton include internal
+flash. The NPCX flash driver supports the NPCX family of devices. The driver
+automatically recognizes the specific version's flash parameters and
+autoconfigures itself. The flash bank starts at address 0x64000000.
+
+@example
+flash bank $_FLASHNAME npcx 0x64000000 0 0 0 $_TARGETNAME
+@end example
+@end deffn
+
 @deffn {Flash Driver} {nrf5}
 All members of the nRF51 microcontroller families from Nordic Semiconductor
 include internal flash and use ARM Cortex-M0 core.
@@ -7302,7 +7333,7 @@ The @var{num} parameter is a value shown by @command{flash banks}.
 @end deffn
 
 @deffn {Flash Driver} {stm32l4x}
-All members of the STM32 G0, G4, L4, L4+, L5, WB and WL
+All members of the STM32 G0, G4, L4, L4+, L5, U5, WB and WL
 microcontroller families from STMicroelectronics include internal flash
 and use ARM Cortex-M0+, M4 and M33 cores.
 The driver automatically recognizes a number of these chips using
@@ -7337,11 +7368,15 @@ Some stm32l4x-specific commands are defined:
 @deffn {Command} {stm32l4x lock} num
 Locks the entire stm32 device.
 The @var{num} parameter is a value shown by @command{flash banks}.
+
+@emph{Note:} To apply the protection change immediately, use @command{stm32l4x option_load}.
 @end deffn
 
 @deffn {Command} {stm32l4x unlock} num
 Unlocks the entire stm32 device.
 The @var{num} parameter is a value shown by @command{flash banks}.
+
+@emph{Note:} To apply the protection change immediately, use @command{stm32l4x option_load}.
 @end deffn
 
 @deffn {Command} {stm32l4x mass_erase} num
@@ -7372,6 +7407,8 @@ The @var{num} parameter is a value shown by @command{flash banks}, @var{reg_offs
 is the register offset of the Option byte to write, and @var{reg_mask} is the mask
 to apply when writing the register (only bits with a '1' will be touched).
 
+@emph{Note:} To apply the option bytes change immediately, use @command{stm32l4x option_load}.
+
 For example to write the WRP1AR option bytes:
 @example
 stm32l4x option_write 0 0x28 0x00FF0000 0x00FF00FF