X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=doc%2Fopenocd.texi;h=a5037b25433fe03a46947e921b2c81073e1d7f77;hp=81a913541d5513fa992435dd15655812e40cf537;hb=a4ac56152d9fc13c3fa479397407d9b86ffb13d8;hpb=5b263d7b0c71d2560af5dabbeec051b807d9e6a3

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 81a913541d..a5037b2543 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9078,7 +9078,7 @@ Enable or disable trace output for all ITM stimulus ports.
 @subsection Cortex-M specific commands
 @cindex Cortex-M
 
-@deffn Command {cortex_m maskisr} (@option{auto}|@option{on}|@option{off})
+@deffn Command {cortex_m maskisr} (@option{auto}|@option{on}|@option{off}|@option{steponly})
 Control masking (disabling) interrupts during target step/resume.
 
 The @option{auto} option handles interrupts during stepping in a way that they
@@ -9088,6 +9088,11 @@ the next instruction where the core was halted. After the step interrupts
 are enabled again. If the interrupt handlers don't complete within 500ms,
 the step command leaves with the core running.
 
+The @option{steponly} option disables interrupts during single-stepping but
+enables them during normal execution. This can be used as a partial workaround
+for 702596 erratum in Cortex-M7 r0p1. See "Cortex-M7 (AT610) and Cortex-M7 with
+FPU (AT611) Software Developer Errata Notice" from ARM for further details.
+
 Note that a free hardware (FPB) breakpoint is required for the @option{auto}
 option. If no breakpoint is available at the time of the step, then the step
 is taken with interrupts enabled, i.e. the same way the @option{off} option