X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=doc%2Fopenocd.texi;h=f614c62949add89d247eb440858b36cb0d6add33;hp=fd8767ed5c6415318fc09584a20e93de009472ff;hb=47d4224d48199e700f7f685c7965a9864dde5f20;hpb=698eaf9896b9b490676b13cf532c0161f7fb67c8;ds=sidebyside

diff --git a/doc/openocd.texi b/doc/openocd.texi
index fd8767ed5c..f614c62949 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -6372,7 +6372,7 @@ various operations. The current target may be changed
 by using @command{targets} command with the name of the
 target which should become current.
 
-@deffn Command reg [(number|name) [value]]
+@deffn Command reg [(number|name) [(value|'force')]]
 Access a single register by @var{number} or by its @var{name}.
 The target must generally be halted before access to CPU core
 registers is allowed. Depending on the hardware, some other
@@ -6386,6 +6386,8 @@ which are also dirty (and will be written back later)
 are flagged as such.
 
 @emph{With number/name}: display that register's value.
+Use @var{force} argument to read directly from the target,
+bypassing any internal cache.
 
 @emph{With both number/name and value}: set register's value.
 Writes may be held in a writeback cache internal to OpenOCD,