X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fat91sam7.c;h=3e5dbdd807b587d9cf390b2633da11e848237206;hp=2ab1cd3f2957a5a20e6ca7a9a19042c4991f5212;hb=2861877b32a7a2f4022a1c3d9b66c9b4879878ac;hpb=8959de9f679cfd0436d731fd91b88a68b9a75fa6 diff --git a/src/flash/at91sam7.c b/src/flash/at91sam7.c index 2ab1cd3f29..3e5dbdd807 100644 --- a/src/flash/at91sam7.c +++ b/src/flash/at91sam7.c @@ -20,20 +20,30 @@ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * ****************************************************************************/ -/*************************************************************************************************************************************************************************************** +/*************************************************************************** * * New flash setup command: * -* flash bank [ ] +* flash bank +* [ +* +* +* ] * * - MUST be used if clock is from external source, -* CAN be used if main oscillator frequency is known (recomended) +* CAN be used if main oscillator frequency is known (recommended) * Examples: -* flash bank at91sam7 0x00100000 0 0 4 0 0 AT91SAM7XC256 1 16 64 256 3 25000 ==== RECOMENDED ============ -* flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 25000 (auto-detection, except for clock) ==== RECOMENDED ============ -* flash bank at91sam7 0x00100000 0 0 4 0 0 AT91SAM7XC256 1 16 64 256 3 0 ==== NOT RECOMENDED !!! ==== -* flash bank at91sam7 0 0 0 0 0 (old style, full auto-detection) ==== NOT RECOMENDED !!! ==== -****************************************************************************************************************************************************************************************/ +* ==== RECOMMENDED (covers clock speed) ============ +* flash bank at91sam7 0x00100000 0 0 4 $_TARGETNAME AT91SAM7XC256 1 16 64 256 3 25000 +* (if auto-detect fails; provides clock spec) +* flash bank at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 25000 +* (auto-detect everything except the clock) +* ==== NOT RECOMMENDED !!! (clock speed is not configured) ==== +* flash bank at91sam7 0x00100000 0 0 4 $_TARGETNAME AT91SAM7XC256 1 16 64 256 3 0 +* (if auto-detect fails) +* flash bank at91sam7 0 0 0 0 $_TARGETNAME +* (old style, auto-detect everything) +****************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" @@ -42,38 +52,13 @@ #include "at91sam7.h" #include "binarybuffer.h" +static int at91sam7_protect_check(struct flash_bank *bank); +static int at91sam7_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count); -static int at91sam7_register_commands(struct command_context_s *cmd_ctx); -static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); -static int at91sam7_erase(struct flash_bank_s *bank, int first, int last); -static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last); -static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count); -static int at91sam7_probe(struct flash_bank_s *bank); -//static int at91sam7_auto_probe(struct flash_bank_s *bank); -static int at91sam7_erase_check(struct flash_bank_s *bank); -static int at91sam7_protect_check(struct flash_bank_s *bank); -static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size); - -static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number); -static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode); -static uint32_t at91sam7_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout); -static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen); -static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); - -flash_driver_t at91sam7_flash = -{ - .name = "at91sam7", - .register_commands = at91sam7_register_commands, - .flash_bank_command = at91sam7_flash_bank_command, - .erase = at91sam7_erase, - .protect = at91sam7_protect, - .write = at91sam7_write, - .probe = at91sam7_probe, - .auto_probe = at91sam7_probe, - .erase_check = at91sam7_erase_check, - .protect_check = at91sam7_protect_check, - .info = at91sam7_info -}; +static uint32_t at91sam7_get_flash_status(struct target *target, int bank_number); +static void at91sam7_set_flash_mode(struct flash_bank *bank, int mode); +static uint32_t at91sam7_wait_status_busy(struct flash_bank *bank, uint32_t waitbits, int timeout); +static int at91sam7_flash_command(struct flash_bank *bank, uint8_t cmd, uint16_t pagen); static uint32_t MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 }; static uint32_t MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 }; @@ -85,8 +70,8 @@ static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","AR static long SRAMSIZ[16] = { -1, 0x0400, /* 1K */ - 0x0800, /* 2K */ - -1, + 0x0800, /* 2K */ + -1, 0x1c000, /* 112K */ 0x1000, /* 4K */ 0x14000, /* 80K */ @@ -102,16 +87,8 @@ static long SRAMSIZ[16] = { }; #endif -static int at91sam7_register_commands(struct command_context_s *cmd_ctx) -{ - command_t *at91sam7_cmd = register_command(cmd_ctx, NULL, "at91sam7", NULL, COMMAND_ANY, NULL); - register_command(cmd_ctx, at91sam7_cmd, "gpnvm", at91sam7_handle_gpnvm_command, COMMAND_EXEC, - "at91sam7 gpnvm set|clear, set or clear one gpnvm bit"); - return ERROR_OK; -} - -static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number) +static uint32_t at91sam7_get_flash_status(struct target *target, int bank_number) { uint32_t fsr; target_read_u32(target, MC_FSR[bank_number], &fsr); @@ -120,10 +97,10 @@ static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number) } /* Read clock configuration and set at91sam7_info->mck_freq */ -static void at91sam7_read_clock_info(flash_bank_t *bank) +static void at91sam7_read_clock_info(struct flash_bank *bank) { - at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; - target_t *target = bank->target; + struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv; + struct target *target = bank->target; uint32_t mckr, mcfr, pllr, mor; unsigned long tmp = 0, mainfreq; @@ -135,10 +112,10 @@ static void at91sam7_read_clock_info(flash_bank_t *bank) target_read_u32(target, PMC_MCKR, &mckr); /* Read Clock Generator PLL Register */ target_read_u32(target, CKGR_PLLR, &pllr); - + at91sam7_info->mck_valid = 0; at91sam7_info->mck_freq = 0; - switch (mckr & PMC_MCKR_CSS) + switch (mckr & PMC_MCKR_CSS) { case 0: /* Slow Clock */ at91sam7_info->mck_valid = 1; @@ -146,7 +123,7 @@ static void at91sam7_read_clock_info(flash_bank_t *bank) break; case 1: /* Main Clock */ - if ((mcfr & CKGR_MCFR_MAINRDY) && + if ((mcfr & CKGR_MCFR_MAINRDY) && (at91sam7_info->ext_freq == 0)) { at91sam7_info->mck_valid = 1; @@ -163,8 +140,8 @@ static void at91sam7_read_clock_info(flash_bank_t *bank) break; case 3: /* PLL Clock */ - if ((mcfr & CKGR_MCFR_MAINRDY) && - (at91sam7_info->ext_freq == 0)) + if ((mcfr & CKGR_MCFR_MAINRDY) && + (at91sam7_info->ext_freq == 0)) { target_read_u32(target, CKGR_PLLR, &pllr); if (!(pllr & CKGR_PLLR_DIV)) @@ -187,7 +164,7 @@ static void at91sam7_read_clock_info(flash_bank_t *bank) } /* Prescaler adjust */ - if ( (((mckr & PMC_MCKR_PRES) >> 2) == 7) || (tmp == 0) ) + if ((((mckr & PMC_MCKR_PRES) >> 2) == 7) || (tmp == 0)) { at91sam7_info->mck_valid = 0; at91sam7_info->mck_freq = 0; @@ -199,11 +176,11 @@ static void at91sam7_read_clock_info(flash_bank_t *bank) } /* Setup the timimg registers for nvbits or normal flash */ -static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode) +static void at91sam7_set_flash_mode(struct flash_bank *bank, int mode) { uint32_t fmr, fmcn = 0, fws = 0; - at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; - target_t *target = bank->target; + struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv; + struct target *target = bank->target; if (mode && (mode != at91sam7_info->flashmode)) { @@ -247,7 +224,7 @@ static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode) at91sam7_info->flashmode = mode; } -static uint32_t at91sam7_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout) +static uint32_t at91sam7_wait_status_busy(struct flash_bank *bank, uint32_t waitbits, int timeout) { uint32_t status; @@ -274,17 +251,17 @@ static uint32_t at91sam7_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, } /* Send one command to the AT91SAM flash controller */ -static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen) +static int at91sam7_flash_command(struct flash_bank *bank, uint8_t cmd, uint16_t pagen) { uint32_t fcr; - at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; - target_t *target = bank->target; + struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv; + struct target *target = bank->target; - fcr = (0x5A << 24) | ((pagen&0x3FF) << 8) | cmd; + fcr = (0x5A << 24) | ((pagen&0x3FF) << 8) | cmd; target_write_u32(target, MC_FCR[bank->bank_number], fcr); LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number + 1, pagen); - if ((at91sam7_info->cidr_arch == 0x60) && ((cmd == SLB)|(cmd == CLB))) + if ((at91sam7_info->cidr_arch == 0x60) && ((cmd == SLB) | (cmd == CLB))) { /* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */ if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C) @@ -294,7 +271,7 @@ static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16 return ERROR_OK; } - if (at91sam7_wait_status_busy(bank, MC_FSR_FRDY, 10)&0x0C) + if (at91sam7_wait_status_busy(bank, MC_FSR_FRDY, 10)&0x0C) { return ERROR_FLASH_OPERATION_FAILED; } @@ -303,11 +280,11 @@ static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16 } /* Read device id register, main clock frequency register and fill in driver info structure */ -static int at91sam7_read_part_info(struct flash_bank_s *bank) +static int at91sam7_read_part_info(struct flash_bank *bank) { - flash_bank_t *t_bank = bank; - at91sam7_flash_bank_t *at91sam7_info; - target_t *target = t_bank->target; + struct flash_bank *t_bank = bank; + struct at91sam7_flash_bank *at91sam7_info; + struct target *target = t_bank->target; uint16_t bnk, sec; uint16_t arch; @@ -327,7 +304,7 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank) if (at91sam7_info->cidr != 0) { /* flash already configured, update clock and check for protected sectors */ - flash_bank_t *fb = bank; + struct flash_bank *fb = bank; t_bank = fb; while (t_bank) @@ -359,7 +336,7 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank) if (at91sam7_info->flash_autodetection == 0) { /* banks and sectors are already created, based on data from input file */ - flash_bank_t *fb = bank; + struct flash_bank *fb = bank; t_bank = fb; while (t_bank) { @@ -550,15 +527,15 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank) /* calculate bank size */ bank_size = sectors_num * pages_per_sector * page_size; - for (bnk = 0; bnk 0) { /* create a new flash bank element */ - flash_bank_t *fb = malloc(sizeof(flash_bank_t)); + struct flash_bank *fb = malloc(sizeof(struct flash_bank)); fb->target = target; - fb->driver = &at91sam7_flash; - fb->driver_priv = malloc(sizeof(at91sam7_flash_bank_t)); + fb->driver = bank->driver; + fb->driver_priv = malloc(sizeof(struct at91sam7_flash_bank)); fb->next = NULL; /* link created bank in 'flash_banks' list and redirect t_bank */ @@ -574,8 +551,8 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank) t_bank->num_sectors = sectors_num; /* allocate sectors */ - t_bank->sectors = malloc(sectors_num * sizeof(flash_sector_t)); - for (sec = 0; secsectors = malloc(sectors_num * sizeof(struct flash_sector)); + for (sec = 0; sec < sectors_num; sec++) { t_bank->sectors[sec].offset = sec * pages_per_sector * page_size; t_bank->sectors[sec].size = pages_per_sector * page_size; @@ -613,14 +590,14 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank) at91sam7_protect_check(t_bank); } - LOG_DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x", at91sam7_info->cidr_nvptyp, at91sam7_info->cidr_arch ); + LOG_DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x", at91sam7_info->cidr_nvptyp, at91sam7_info->cidr_arch); return ERROR_OK; } -static int at91sam7_erase_check(struct flash_bank_s *bank) +static int at91sam7_erase_check(struct flash_bank *bank) { - target_t *target = bank->target; + struct target *target = bank->target; uint16_t retval; uint32_t blank; uint16_t fast_check; @@ -635,11 +612,11 @@ static int at91sam7_erase_check(struct flash_bank_s *bank) } /* Configure the flash controller timing */ - at91sam7_read_clock_info(bank); + at91sam7_read_clock_info(bank); at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH); fast_check = 1; - for (nSector = 0; nSectornum_sectors; nSector++) + for (nSector = 0; nSector < bank->num_sectors; nSector++) { retval = target_blank_check_memory(target, bank->base + bank->sectors[nSector].offset, bank->sectors[nSector].size, &blank); @@ -662,7 +639,7 @@ static int at91sam7_erase_check(struct flash_bank_s *bank) LOG_USER("Running slow fallback erase check - add working memory"); buffer = malloc(bank->sectors[0].size); - for (nSector = 0; nSectornum_sectors; nSector++) + for (nSector = 0; nSector < bank->num_sectors; nSector++) { bank->sectors[nSector].is_erased = 1; retval = target_read_memory(target, bank->base + bank->sectors[nSector].offset, 4, @@ -670,7 +647,7 @@ static int at91sam7_erase_check(struct flash_bank_s *bank) if (retval != ERROR_OK) return retval; - for (nByte = 0; nBytesectors[nSector].size; nByte++) + for (nByte = 0; nByte < bank->sectors[nSector].size; nByte++) { if (buffer[nByte] != 0xFF) { @@ -684,12 +661,12 @@ static int at91sam7_erase_check(struct flash_bank_s *bank) return ERROR_OK; } -static int at91sam7_protect_check(struct flash_bank_s *bank) +static int at91sam7_protect_check(struct flash_bank *bank) { uint8_t lock_pos, gpnvm_pos; uint32_t status; - at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; + struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv; if (at91sam7_info->cidr == 0) { @@ -705,9 +682,9 @@ static int at91sam7_protect_check(struct flash_bank_s *bank) at91sam7_info->lockbits = (status >> 16); at91sam7_info->num_lockbits_on = 0; - for (lock_pos = 0; lock_posnum_sectors; lock_pos++) + for (lock_pos = 0; lock_pos < bank->num_sectors; lock_pos++) { - if ( ((status >> (16 + lock_pos))&(0x0001)) == 1) + if (((status >> (16 + lock_pos))&(0x0001)) == 1) { at91sam7_info->num_lockbits_on++; bank->sectors[lock_pos].is_protected = 1; @@ -723,9 +700,9 @@ static int at91sam7_protect_check(struct flash_bank_s *bank) at91sam7_info->nvmbits = (status >> 8)&0xFF; at91sam7_info->num_nvmbits_on = 0; - for (gpnvm_pos = 0; gpnvm_posnum_nvmbits; gpnvm_pos++) + for (gpnvm_pos = 0; gpnvm_pos < at91sam7_info->num_nvmbits; gpnvm_pos++) { - if ( ((status >> (8 + gpnvm_pos))&(0x01)) == 1) + if (((status >> (8 + gpnvm_pos))&(0x01)) == 1) { at91sam7_info->num_nvmbits_on++; } @@ -734,25 +711,15 @@ static int at91sam7_protect_check(struct flash_bank_s *bank) return ERROR_OK; } -/*************************************************************************************************************************************************************************************** -# flash bank [ ] -# - MUST be used if clock is from external source -# CAN be used if main oscillator frequency is known -# Examples: -# flash bank at91sam7 0x00100000 0 0 4 0 0 AT91SAM7XC256 1 16 64 256 3 25000 ==== RECOMENDED ============ -# flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 25000 (auto-detection, except for clock) ==== RECOMENDED ============ -# flash bank at91sam7 0x00100000 0 0 4 0 0 AT91SAM7XC256 1 16 64 256 3 0 ==== NOT RECOMENDED !!! ==== -# flash bank at91sam7 0 0 0 0 0 (old style, full auto-detection) ==== NOT RECOMENDED !!! ==== -****************************************************************************************************************************************************************************************/ -static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) +FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command) { - flash_bank_t *t_bank = bank; - at91sam7_flash_bank_t *at91sam7_info; - target_t *target = t_bank->target; + struct flash_bank *t_bank = bank; + struct at91sam7_flash_bank *at91sam7_info; + struct target *target = t_bank->target; uint32_t base_address; uint32_t bank_size; - uint32_t ext_freq; + uint32_t ext_freq = 0; int chip_width; int bus_width; @@ -767,7 +734,7 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char * int bnk, sec; - at91sam7_info = malloc(sizeof(at91sam7_flash_bank_t)); + at91sam7_info = malloc(sizeof(struct at91sam7_flash_bank)); t_bank->driver_priv = at91sam7_info; /* part wasn't probed for info yet */ @@ -776,48 +743,52 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char * at91sam7_info->ext_freq = 0; at91sam7_info->flash_autodetection = 0; - if (argc == 14) + if (CMD_ARGC < 13) { - ext_freq = atol(args[13]) * 1000; + at91sam7_info->flash_autodetection = 1; + return ERROR_OK; + } + + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], base_address); + + COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], chip_width); + COMMAND_PARSE_NUMBER(int, CMD_ARGV[4], bus_width); + + COMMAND_PARSE_NUMBER(int, CMD_ARGV[8], banks_num); + COMMAND_PARSE_NUMBER(int, CMD_ARGV[9], num_sectors); + COMMAND_PARSE_NUMBER(u16, CMD_ARGV[10], pages_per_sector); + COMMAND_PARSE_NUMBER(u16, CMD_ARGV[11], page_size); + COMMAND_PARSE_NUMBER(u16, CMD_ARGV[12], num_nvmbits); + + if (CMD_ARGC == 14) { + unsigned long freq; + COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[13], freq); + ext_freq = freq * 1000; at91sam7_info->ext_freq = ext_freq; } - if ((argc != 14) || - (atoi(args[4]) == 0) || /* bus width */ - (atoi(args[8]) == 0) || /* banks number */ - (atoi(args[9]) == 0) || /* sectors per bank */ - (atoi(args[10]) == 0) || /* pages per sector */ - (atoi(args[11]) == 0) || /* page size */ - (atoi(args[12]) == 0)) /* nvmbits number */ + if ((bus_width == 0) || (banks_num == 0) || (num_sectors == 0) || + (pages_per_sector == 0) || (page_size == 0) || (num_nvmbits == 0)) { at91sam7_info->flash_autodetection = 1; return ERROR_OK; } - base_address = strtoul(args[1], NULL, 0); - chip_width = atoi(args[3]); - bus_width = atoi(args[4]); - banks_num = atoi(args[8]); - num_sectors = atoi(args[9]); - pages_per_sector = atoi(args[10]); - page_size = atoi(args[11]); - num_nvmbits = atoi(args[12]); - - target_name = calloc(strlen(args[7]) + 1, sizeof(char)); - strcpy(target_name, args[7]); + target_name = calloc(strlen(CMD_ARGV[7]) + 1, sizeof(char)); + strcpy(target_name, CMD_ARGV[7]); /* calculate bank size */ bank_size = num_sectors * pages_per_sector * page_size; - for (bnk = 0; bnk 0) { /* create a new bank element */ - flash_bank_t *fb = malloc(sizeof(flash_bank_t)); + struct flash_bank *fb = malloc(sizeof(struct flash_bank)); fb->target = target; - fb->driver = &at91sam7_flash; - fb->driver_priv = malloc(sizeof(at91sam7_flash_bank_t)); + fb->driver = bank->driver; + fb->driver_priv = malloc(sizeof(struct at91sam7_flash_bank)); fb->next = NULL; /* link created bank in 'flash_banks' list and redirect t_bank */ @@ -833,8 +804,8 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char * t_bank->num_sectors = num_sectors; /* allocate sectors */ - t_bank->sectors = malloc(num_sectors * sizeof(flash_sector_t)); - for (sec = 0; secsectors = malloc(num_sectors * sizeof(struct flash_sector)); + for (sec = 0; sec < num_sectors; sec++) { t_bank->sectors[sec].offset = sec * pages_per_sector * page_size; t_bank->sectors[sec].size = pages_per_sector * page_size; @@ -856,9 +827,9 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char * return ERROR_OK; } -static int at91sam7_erase(struct flash_bank_s *bank, int first, int last) +static int at91sam7_erase(struct flash_bank *bank, int first, int last) { - at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; + struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv; int sec; uint32_t nbytes, pos; uint8_t *buffer; @@ -892,7 +863,7 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last) if (erase_all) { - if (at91sam7_flash_command(bank, EA, 0) != ERROR_OK) + if (at91sam7_flash_command(bank, EA, 0) != ERROR_OK) { return ERROR_FLASH_OPERATION_FAILED; } @@ -902,12 +873,12 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last) /* allocate and clean buffer */ nbytes = (last - first + 1) * bank->sectors[first].size; buffer = malloc(nbytes * sizeof(uint8_t)); - for (pos = 0; possectors[first].offset, nbytes) != ERROR_OK) + if (at91sam7_write(bank, buffer, bank->sectors[first].offset, nbytes) != ERROR_OK) { return ERROR_FLASH_OPERATION_FAILED; } @@ -924,13 +895,13 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last) return ERROR_OK; } -static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last) +static int at91sam7_protect(struct flash_bank *bank, int set, int first, int last) { uint32_t cmd; int sector; uint32_t pagen; - at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; + struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv; if (at91sam7_info->cidr == 0) { @@ -974,11 +945,11 @@ static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int l return ERROR_OK; } -static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +static int at91sam7_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) { int retval; - at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; - target_t *target = bank->target; + struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv; + struct target *target = bank->target; uint32_t dst_min_alignment, wcount, bytes_remaining = count; uint32_t first_page, last_page, pagen, buffer_pos; @@ -1008,7 +979,7 @@ static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t o return ERROR_FLASH_BANK_NOT_PROBED; first_page = offset/dst_min_alignment; - last_page = CEIL(offset + count, dst_min_alignment); + last_page = DIV_ROUND_UP(offset + count, dst_min_alignment); LOG_DEBUG("first_page: %i, last_page: %i, count %i", (int)first_page, (int)last_page, (int)count); @@ -1016,9 +987,9 @@ static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t o at91sam7_read_clock_info(bank); at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH); - for (pagen = first_page; pagenbase + pagen*dst_min_alignment, 4, wcount, buffer + buffer_pos)) != ERROR_OK) { return retval; @@ -1043,7 +1014,7 @@ static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t o return ERROR_OK; } -static int at91sam7_probe(struct flash_bank_s *bank) +static int at91sam7_probe(struct flash_bank *bank) { /* we can't probe on an at91sam7 * if this is an at91sam7, it has the configured flash */ @@ -1062,10 +1033,10 @@ static int at91sam7_probe(struct flash_bank_s *bank) return ERROR_OK; } -static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int at91sam7_info(struct flash_bank *bank, char *buf, int buf_size) { int printed; - at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; + struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv; if (at91sam7_info->cidr == 0) { @@ -1079,13 +1050,13 @@ static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - printed = snprintf(buf, + printed = snprintf(buf, buf_size, " Cidr: 0x%8.8" PRIx32 " | Arch: 0x%4.4x | Eproc: %s | Version: 0x%3.3x | Flashsize: 0x%8.8" PRIx32 "\n", - at91sam7_info->cidr, - at91sam7_info->cidr_arch, + at91sam7_info->cidr, + at91sam7_info->cidr_arch, EPROC[at91sam7_info->cidr_eproc], - at91sam7_info->cidr_version, + at91sam7_info->cidr_version, bank->size); buf += printed; @@ -1117,28 +1088,28 @@ static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size) return ERROR_OK; } -/* -* On AT91SAM7S: When the gpnvm bits are set with +/* +* On AT91SAM7S: When the gpnvm bits are set with * > at91sam7 gpnvm bitnr set -* the changes are not visible in the flash controller status register MC_FSR +* the changes are not visible in the flash controller status register MC_FSR * until the processor has been reset. * On the Olimex board this requires a power cycle. * Note that the AT91SAM7S has the following errata (doc6175.pdf sec 14.1.3): * The maximum number of write/erase cycles for Non volatile Memory bits is 100. this includes * Lock Bits (LOCKx), General Purpose NVM bits (GPNVMx) and the Security Bit. */ -static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +COMMAND_HANDLER(at91sam7_handle_gpnvm_command) { - flash_bank_t *bank; + struct flash_bank *bank; int bit; uint8_t flashcmd; uint32_t status; - at91sam7_flash_bank_t *at91sam7_info; + struct at91sam7_flash_bank *at91sam7_info; int retval; - if (argc != 2) + if (CMD_ARGC != 2) { - command_print(cmd_ctx, "at91sam7 gpnvm "); + command_print(CMD_CTX, "at91sam7 gpnvm "); return ERROR_OK; } @@ -1147,9 +1118,9 @@ static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char { return ERROR_FLASH_BANK_INVALID; } - if (bank->driver != &at91sam7_flash) + if (strcmp(bank->driver->name, "at91sam7")) { - command_print(cmd_ctx, "not an at91sam7 flash bank '%s'", args[0]); + command_print(CMD_CTX, "not an at91sam7 flash bank '%s'", CMD_ARGV[0]); return ERROR_FLASH_BANK_INVALID; } if (bank->target->state != TARGET_HALTED) @@ -1158,11 +1129,11 @@ static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char return ERROR_TARGET_NOT_HALTED; } - if (strcmp(args[1], "set") == 0) + if (strcmp(CMD_ARGV[1], "set") == 0) { flashcmd = SGPB; } - else if (strcmp(args[1], "clear") == 0) + else if (strcmp(CMD_ARGV[1], "clear") == 0) { flashcmd = CGPB; } @@ -1181,17 +1152,17 @@ static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char } } - bit = atoi(args[0]); + COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], bit); if ((bit < 0) || (bit >= at91sam7_info->num_nvmbits)) { - command_print(cmd_ctx, "gpnvm bit '#%s' is out of bounds for target %s", args[0], at91sam7_info->target_name); + command_print(CMD_CTX, "gpnvm bit '#%s' is out of bounds for target %s", CMD_ARGV[0], at91sam7_info->target_name); return ERROR_OK; } /* Configure the flash controller timing */ at91sam7_read_clock_info(bank); at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS); - + if (at91sam7_flash_command(bank, flashcmd, bit) != ERROR_OK) { return ERROR_FLASH_OPERATION_FAILED; @@ -1203,6 +1174,33 @@ static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char /* check protect state */ at91sam7_protect_check(bank); - + return ERROR_OK; } + +static int at91sam7_register_commands(struct command_context *cmd_ctx) +{ + struct command *at91sam7_cmd = register_command(cmd_ctx, NULL, "at91sam7", + NULL, COMMAND_ANY, NULL); + + register_command(cmd_ctx, at91sam7_cmd, "gpnvm", + at91sam7_handle_gpnvm_command, COMMAND_EXEC, + "at91sam7 gpnvm set | clear, " + "set or clear one gpnvm bit"); + + return ERROR_OK; +} + +struct flash_driver at91sam7_flash = { + .name = "at91sam7", + .register_commands = &at91sam7_register_commands, + .flash_bank_command = &at91sam7_flash_bank_command, + .erase = &at91sam7_erase, + .protect = &at91sam7_protect, + .write = &at91sam7_write, + .probe = &at91sam7_probe, + .auto_probe = &at91sam7_probe, + .erase_check = &at91sam7_erase_check, + .protect_check = &at91sam7_protect_check, + .info = &at91sam7_info, + };