X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fmflash.h;h=a2bd5b3a888da748982d64acdc51d3ef543ae5c3;hp=4f9e0a003e5227c4fcbc7cc589ff13a7571f3162;hb=0f1163e823c6ca3c2a81fa296157f5dde0635fea;hpb=0cba0d4df3fe120f08945703506f8405760325c9 diff --git a/src/flash/mflash.h b/src/flash/mflash.h index 4f9e0a003e..a2bd5b3a88 100644 --- a/src/flash/mflash.h +++ b/src/flash/mflash.h @@ -20,22 +20,24 @@ #ifndef _MFLASH_H #define _MFLASH_H +#include "target.h" + typedef unsigned long mg_io_uint32; typedef unsigned short mg_io_uint16; typedef unsigned char mg_io_uint8; -typedef struct mflash_gpio_num_s +struct mflash_gpio_num { char port[2]; signed short num; -} mflash_gpio_num_t; +}; -typedef struct mflash_gpio_drv_s +struct mflash_gpio_drv { char *name; - int (*set_gpio_to_output) (mflash_gpio_num_t gpio); - int (*set_gpio_output_val) (mflash_gpio_num_t gpio, u8 val); -} mflash_gpio_drv_t; + int (*set_gpio_to_output) (struct mflash_gpio_num gpio); + int (*set_gpio_output_val) (struct mflash_gpio_num gpio, uint8_t val); +}; typedef struct _mg_io_type_drv_info { @@ -46,7 +48,7 @@ typedef struct _mg_io_type_drv_info { mg_io_uint16 unformatted_bytes_per_track; /* 04 */ mg_io_uint16 unformatted_bytes_per_sector; /* 05 */ mg_io_uint16 sectors_per_track; /* 06 */ - mg_io_uint8 vendor_unique1[6]; /* 07/08/09 */ + mg_io_uint16 vendor_unique1[3]; /* 07/08/09 */ mg_io_uint8 serial_number[20]; /* 10~19 */ @@ -115,30 +117,32 @@ typedef struct _mg_io_type_drv_info { } mg_io_type_drv_info; -typedef struct mg_drv_info_s { +typedef struct _mg_pll_t +{ + unsigned int lock_cyc; + unsigned short feedback_div; /* 9bit divider */ + unsigned char input_div; /* 5bit divider */ + unsigned char output_div; /* 2bit divider */ +} mg_pll_t; + +struct mg_drv_info { mg_io_type_drv_info drv_id; - u32 tot_sects; -} mg_drv_info_t; + uint32_t tot_sects; +}; -typedef struct mflash_bank_s +struct mflash_bank { - u32 base; - u32 chip_width; - u32 bus_width; - - mflash_gpio_num_t rst_pin; - mflash_gpio_num_t wp_pin; - mflash_gpio_num_t dpd_pin; + uint32_t base; - mflash_gpio_drv_t *gpio_drv; - target_t *target; - mg_drv_info_t *drv_info; + struct mflash_gpio_num rst_pin; - u8 proved; -} mflash_bank_t; + struct mflash_gpio_drv *gpio_drv; + struct target *target; + struct mg_drv_info *drv_info; +}; -extern int mflash_register_commands(struct command_context_s *cmd_ctx); -extern int mflash_init_drivers(struct command_context_s *cmd_ctx); +int mflash_register_commands(struct command_context_s *cmd_ctx); +int mflash_init_drivers(struct command_context_s *cmd_ctx); #define MG_MFLASH_SECTOR_SIZE (0x200) /* 512Bytes = 2^9 */ #define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1) @@ -162,6 +166,25 @@ extern int mflash_init_drivers(struct command_context_s *cmd_ctx); #define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 /* msec */ #define MG_OEM_DISK_WAIT_TIME_SHORT 1000 /* msec */ +#define MG_PLL_CLK_OUT 66000000.0 /* 66Mhz */ +#define MG_PLL_MAX_FEEDBACKDIV_VAL 512 +#define MG_PLL_MAX_INPUTDIV_VAL 32 +#define MG_PLL_MAX_OUTPUTDIV_VAL 4 + +#define MG_PLL_STD_INPUTCLK 12000000.0 /* 12Mhz */ +#define MG_PLL_STD_LOCKCYCLE 10000 + +#define MG_UNLOCK_OTP_AREA 0xFF + +#define MG_FILEIO_CHUNK 1048576 + +#define ERROR_MG_IO (-1600) +#define ERROR_MG_TIMEOUT (-1601) +#define ERROR_MG_INVALID_PLL (-1603) +#define ERROR_MG_INTERFACE (-1604) +#define ERROR_MG_INVALID_OSC (-1605) +#define ERROR_MG_UNSUPPORTED_SOC (-1606) + typedef enum _mg_io_type_wait{ mg_io_wait_bsy = 1, @@ -242,4 +265,37 @@ typedef enum _mg_io_type_cmd } mg_io_type_cmd; +typedef enum _mg_feature_id +{ + mg_feature_id_transmode = 0x3 +} mg_feature_id; + +typedef enum _mg_feature_val +{ + mg_feature_val_trans_default = 0x0, + mg_feature_val_trans_vcmd = 0x3, + mg_feature_val_trand_vcmds = 0x2 +} mg_feature_val; + +typedef enum _mg_vcmd +{ + mg_vcmd_update_xipinfo = 0xFA, /* FWPATCH commmand through IOM I/O */ + mg_vcmd_verify_fwpatch = 0xFB, /* FWPATCH commmand through IOM I/O */ + mg_vcmd_update_stgdrvinfo = 0xFC, /* IOM identificatin info program command */ + mg_vcmd_prep_fwpatch = 0xFD, /* FWPATCH commmand through IOM I/O */ + mg_vcmd_exe_fwpatch = 0xFE, /* FWPATCH commmand through IOM I/O */ + mg_vcmd_wr_pll = 0x8B, + mg_vcmd_purge_nand = 0x8C, /* Only for Seagle */ + mg_vcmd_lock_otp = 0x8D, + mg_vcmd_rd_otp = 0x8E, + mg_vcmd_wr_otp = 0x8F +} mg_vcmd; + +typedef enum _mg_opmode +{ + mg_op_mode_xip = 1, /* TRUE XIP */ + mg_op_mode_snd = 2, /* BOOT + Storage */ + mg_op_mode_stg = 0 /* Only Storage */ +} mg_opmode; + #endif