X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fmx3_nand.c;h=6c699179ec461d41a24da2416e549b31c96f55b2;hp=a5df00338be9f0f3821424bb0cbb7fbf1099d226;hb=2f6e56e38320350bb300b363d0b3737fa8d1f3ea;hpb=a0b1e05b5300817e1fe2bc4dae31601d02cfd815 diff --git a/src/flash/mx3_nand.c b/src/flash/mx3_nand.c index a5df00338b..6c699179ec 100644 --- a/src/flash/mx3_nand.c +++ b/src/flash/mx3_nand.c @@ -47,64 +47,31 @@ static const char get_status_register_err_msg[] = "can't get NAND status"; static uint32_t in_sram_address; unsigned char sign_of_sequental_byte_read; -static int test_iomux_settings (target_t * target, uint32_t value, +static int test_iomux_settings (struct target * target, uint32_t value, uint32_t mask, const char *text); -static int initialize_nf_controller (struct nand_device_s *device); -static int get_next_byte_from_sram_buffer (target_t * target, uint8_t * value); -static int get_next_halfword_from_sram_buffer (target_t * target, +static int initialize_nf_controller (struct nand_device *nand); +static int get_next_byte_from_sram_buffer (struct target * target, uint8_t * value); +static int get_next_halfword_from_sram_buffer (struct target * target, uint16_t * value); -static int poll_for_complete_op (target_t * target, const char *text); -static int validate_target_state (struct nand_device_s *device); -static int do_data_output (struct nand_device_s *device); - -static int imx31_nand_device_command (struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc, - struct nand_device_s *device); -static int imx31_init (struct nand_device_s *device); -static int imx31_read_data (struct nand_device_s *device, void *data); -static int imx31_write_data (struct nand_device_s *device, uint16_t data); -static int imx31_nand_ready (struct nand_device_s *device, int timeout); -static int imx31_register_commands (struct command_context_s *cmd_ctx); -static int imx31_reset (struct nand_device_s *device); -static int imx31_command (struct nand_device_s *device, uint8_t command); -static int imx31_address (struct nand_device_s *device, uint8_t address); -static int imx31_controller_ready (struct nand_device_s *device, int tout); -static int imx31_write_page (struct nand_device_s *device, uint32_t page, - uint8_t * data, uint32_t data_size, uint8_t * oob, - uint32_t oob_size); -static int imx31_read_page (struct nand_device_s *device, uint32_t page, - uint8_t * data, uint32_t data_size, uint8_t * oob, - uint32_t oob_size); - -nand_flash_controller_t imx31_nand_flash_controller = { - .name = "imx31", - .nand_device_command = imx31_nand_device_command, - .register_commands = imx31_register_commands, - .init = imx31_init, - .reset = imx31_reset, - .command = imx31_command, - .address = imx31_address, - .write_data = imx31_write_data, - .read_data = imx31_read_data, - .write_page = imx31_write_page, - .read_page = imx31_read_page, - .controller_ready = imx31_controller_ready, - .nand_ready = imx31_nand_ready, -}; - -static int imx31_nand_device_command (struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc, - struct nand_device_s *device) +static int poll_for_complete_op (struct target * target, const char *text); +static int validate_target_state (struct nand_device *nand); +static int do_data_output (struct nand_device *nand); + +static int imx31_command (struct nand_device *nand, uint8_t command); +static int imx31_address (struct nand_device *nand, uint8_t address); +static int imx31_controller_ready (struct nand_device *nand, int tout); + +NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command) { - mx3_nf_controller_t *mx3_nf_info; - mx3_nf_info = malloc (sizeof (mx3_nf_controller_t)); + struct mx3_nf_controller *mx3_nf_info; + mx3_nf_info = malloc (sizeof (struct mx3_nf_controller)); if (mx3_nf_info == NULL) { LOG_ERROR ("no memory for nand controller"); return ERROR_FAIL; } - device->controller_priv = mx3_nf_info; + nand->controller_priv = mx3_nf_info; mx3_nf_info->target = get_target (args[1]); if (mx3_nf_info->target == NULL) @@ -154,17 +121,17 @@ static int imx31_nand_device_command (struct command_context_s *cmd_ctx, return ERROR_OK; } -static int imx31_init (struct nand_device_s *device) +static int imx31_init (struct nand_device *nand) { - mx3_nf_controller_t *mx3_nf_info = device->controller_priv; - target_t *target = mx3_nf_info->target; + struct mx3_nf_controller *mx3_nf_info = nand->controller_priv; + struct target *target = mx3_nf_info->target; { /* * validate target state */ int validate_target_result; - validate_target_result = validate_target_state (device); + validate_target_result = validate_target_state(nand); if (validate_target_result != ERROR_OK) { return validate_target_result; @@ -180,30 +147,30 @@ static int imx31_init (struct nand_device_s *device) { uint32_t pcsr_register_content; target_read_u32 (target, MX3_PCSR, &pcsr_register_content); - if (!device->bus_width) + if (!nand->bus_width) { - device->bus_width = + nand->bus_width = (pcsr_register_content & 0x80000000) ? 16 : 8; } else { pcsr_register_content |= - ((device->bus_width == 16) ? 0x80000000 : 0x00000000); + ((nand->bus_width == 16) ? 0x80000000 : 0x00000000); target_write_u32 (target, MX3_PCSR, pcsr_register_content); } - if (!device->page_size) + if (!nand->page_size) { - device->page_size = + nand->page_size = (pcsr_register_content & 0x40000000) ? 2048 : 512; } else { pcsr_register_content |= - ((device->page_size == 2048) ? 0x40000000 : 0x00000000); + ((nand->page_size == 2048) ? 0x40000000 : 0x00000000); target_write_u32 (target, MX3_PCSR, pcsr_register_content); } - if (mx3_nf_info->flags.one_kb_sram && (device->page_size == 2048)) + if (mx3_nf_info->flags.one_kb_sram && (nand->page_size == 2048)) { LOG_ERROR ("NAND controller have only 1 kb SRAM, so pagesize 2048 is incompatible with it"); @@ -243,7 +210,7 @@ static int imx31_init (struct nand_device_s *device) test_iomux_settings (target, 0x43fac0c4, 0x7f7f7f7f, "d3,d4,d5,d6"); test_iomux |= test_iomux_settings (target, 0x43fac0c8, 0x0000007f, "d7"); - if (device->bus_width == 16) + if (nand->bus_width == 16) { test_iomux |= test_iomux_settings (target, 0x43fac0c8, 0x7f7f7f00, @@ -266,15 +233,15 @@ static int imx31_init (struct nand_device_s *device) } } - initialize_nf_controller (device); + initialize_nf_controller (nand); { int retval; uint16_t nand_status_content; retval = ERROR_OK; - retval |= imx31_command (device, NAND_CMD_STATUS); - retval |= imx31_address (device, 0x00); - retval |= do_data_output (device); + retval |= imx31_command (nand, NAND_CMD_STATUS); + retval |= imx31_address (nand, 0x00); + retval |= do_data_output (nand); if (retval != ERROR_OK) { LOG_ERROR (get_status_register_err_msg); @@ -297,16 +264,16 @@ static int imx31_init (struct nand_device_s *device) return ERROR_OK; } -static int imx31_read_data (struct nand_device_s *device, void *data) +static int imx31_read_data (struct nand_device *nand, void *data) { - mx3_nf_controller_t *mx3_nf_info = device->controller_priv; - target_t *target = mx3_nf_info->target; + struct mx3_nf_controller *mx3_nf_info = nand->controller_priv; + struct target *target = mx3_nf_info->target; { /* * validate target state */ int validate_target_result; - validate_target_result = validate_target_state (device); + validate_target_result = validate_target_state (nand); if (validate_target_result != ERROR_OK) { return validate_target_result; @@ -318,14 +285,14 @@ static int imx31_read_data (struct nand_device_s *device, void *data) * get data from nand chip */ int try_data_output_from_nand_chip; - try_data_output_from_nand_chip = do_data_output (device); + try_data_output_from_nand_chip = do_data_output (nand); if (try_data_output_from_nand_chip != ERROR_OK) { return try_data_output_from_nand_chip; } } - if (device->bus_width == 16) + if (nand->bus_width == 16) { get_next_halfword_from_sram_buffer (target, data); } @@ -337,15 +304,15 @@ static int imx31_read_data (struct nand_device_s *device, void *data) return ERROR_OK; } -static int imx31_write_data (struct nand_device_s *device, uint16_t data) +static int imx31_write_data (struct nand_device *nand, uint16_t data) { LOG_ERROR ("write_data() not implemented"); return ERROR_NAND_OPERATION_FAILED; } -static int imx31_nand_ready (struct nand_device_s *device, int timeout) +static int imx31_nand_ready (struct nand_device *nand, int timeout) { - return imx31_controller_ready (device, timeout); + return imx31_controller_ready (nand, timeout); } static int imx31_register_commands (struct command_context_s *cmd_ctx) @@ -353,31 +320,31 @@ static int imx31_register_commands (struct command_context_s *cmd_ctx) return ERROR_OK; } -static int imx31_reset (struct nand_device_s *device) +static int imx31_reset (struct nand_device *nand) { /* * validate target state */ int validate_target_result; - validate_target_result = validate_target_state (device); + validate_target_result = validate_target_state (nand); if (validate_target_result != ERROR_OK) { return validate_target_result; } - initialize_nf_controller (device); + initialize_nf_controller (nand); return ERROR_OK; } -static int imx31_command (struct nand_device_s *device, uint8_t command) +static int imx31_command (struct nand_device *nand, uint8_t command) { - mx3_nf_controller_t *mx3_nf_info = device->controller_priv; - target_t *target = mx3_nf_info->target; + struct mx3_nf_controller *mx3_nf_info = nand->controller_priv; + struct target *target = mx3_nf_info->target; { /* * validate target state */ int validate_target_result; - validate_target_result = validate_target_state (device); + validate_target_result = validate_target_state (nand); if (validate_target_result != ERROR_OK) { return validate_target_result; @@ -400,7 +367,7 @@ static int imx31_command (struct nand_device_s *device, uint8_t command) * offset == one half of page size */ in_sram_address = - MX3_NF_MAIN_BUFFER0 + (device->page_size >> 1); + MX3_NF_MAIN_BUFFER0 + (nand->page_size >> 1); default: in_sram_address = MX3_NF_MAIN_BUFFER0; } @@ -442,16 +409,16 @@ static int imx31_command (struct nand_device_s *device, uint8_t command) return ERROR_OK; } -static int imx31_address (struct nand_device_s *device, uint8_t address) +static int imx31_address (struct nand_device *nand, uint8_t address) { - mx3_nf_controller_t *mx3_nf_info = device->controller_priv; - target_t *target = mx3_nf_info->target; + struct mx3_nf_controller *mx3_nf_info = nand->controller_priv; + struct target *target = mx3_nf_info->target; { /* * validate target state */ int validate_target_result; - validate_target_result = validate_target_state (device); + validate_target_result = validate_target_state (nand); if (validate_target_result != ERROR_OK) { return validate_target_result; @@ -474,18 +441,18 @@ static int imx31_address (struct nand_device_s *device, uint8_t address) return ERROR_OK; } -static int imx31_controller_ready (struct nand_device_s *device, int tout) +static int imx31_controller_ready (struct nand_device *nand, int tout) { uint16_t poll_complete_status; - mx3_nf_controller_t *mx3_nf_info = device->controller_priv; - target_t *target = mx3_nf_info->target; + struct mx3_nf_controller *mx3_nf_info = nand->controller_priv; + struct target *target = mx3_nf_info->target; { /* * validate target state */ int validate_target_result; - validate_target_result = validate_target_state (device); + validate_target_result = validate_target_state (nand); if (validate_target_result != ERROR_OK) { return validate_target_result; @@ -505,12 +472,12 @@ static int imx31_controller_ready (struct nand_device_s *device, int tout) return tout; } -static int imx31_write_page (struct nand_device_s *device, uint32_t page, +static int imx31_write_page (struct nand_device *nand, uint32_t page, uint8_t * data, uint32_t data_size, uint8_t * oob, uint32_t oob_size) { - mx3_nf_controller_t *mx3_nf_info = device->controller_priv; - target_t *target = mx3_nf_info->target; + struct mx3_nf_controller *mx3_nf_info = nand->controller_priv; + struct target *target = mx3_nf_info->target; if (data_size % 2) { @@ -532,7 +499,7 @@ static int imx31_write_page (struct nand_device_s *device, uint32_t page, * validate target state */ int retval; - retval = validate_target_state (device); + retval = validate_target_state (nand); if (retval != ERROR_OK) { return retval; @@ -540,16 +507,16 @@ static int imx31_write_page (struct nand_device_s *device, uint32_t page, } { int retval = ERROR_OK; - retval |= imx31_command (device, NAND_CMD_SEQIN); - retval |= imx31_address (device, 0x00); - retval |= imx31_address (device, page & 0xff); - retval |= imx31_address (device, (page >> 8) & 0xff); - if (device->address_cycles >= 4) - { - retval |= imx31_address (device, (page >> 16) & 0xff); - if (device->address_cycles >= 5) + retval |= imx31_command(nand, NAND_CMD_SEQIN); + retval |= imx31_address(nand, 0x00); + retval |= imx31_address(nand, page & 0xff); + retval |= imx31_address(nand, (page >> 8) & 0xff); + if (nand->address_cycles >= 4) + { + retval |= imx31_address (nand, (page >> 16) & 0xff); + if (nand->address_cycles >= 5) { - retval |= imx31_address (device, (page >> 24) & 0xff); + retval |= imx31_address (nand, (page >> 24) & 0xff); } } target_write_buffer (target, MX3_NF_MAIN_BUFFER0, data_size, data); @@ -579,7 +546,7 @@ static int imx31_write_page (struct nand_device_s *device, uint32_t page, return poll_result; } } - retval |= imx31_command (device, NAND_CMD_PAGEPROG); + retval |= imx31_command (nand, NAND_CMD_PAGEPROG); if (retval != ERROR_OK) { return retval; @@ -591,9 +558,9 @@ static int imx31_write_page (struct nand_device_s *device, uint32_t page, { uint16_t nand_status_content; retval = ERROR_OK; - retval |= imx31_command (device, NAND_CMD_STATUS); - retval |= imx31_address (device, 0x00); - retval |= do_data_output (device); + retval |= imx31_command(nand, NAND_CMD_STATUS); + retval |= imx31_address(nand, 0x00); + retval |= do_data_output(nand); if (retval != ERROR_OK) { LOG_ERROR (get_status_register_err_msg); @@ -612,12 +579,12 @@ static int imx31_write_page (struct nand_device_s *device, uint32_t page, return ERROR_OK; } -static int imx31_read_page (struct nand_device_s *device, uint32_t page, +static int imx31_read_page (struct nand_device *nand, uint32_t page, uint8_t * data, uint32_t data_size, uint8_t * oob, uint32_t oob_size) { - mx3_nf_controller_t *mx3_nf_info = device->controller_priv; - target_t *target = mx3_nf_info->target; + struct mx3_nf_controller *mx3_nf_info = nand->controller_priv; + struct target *target = mx3_nf_info->target; if (data_size % 2) { @@ -635,7 +602,7 @@ static int imx31_read_page (struct nand_device_s *device, uint32_t page, * validate target state */ int retval; - retval = validate_target_state (device); + retval = validate_target_state(nand); if (retval != ERROR_OK) { return retval; @@ -643,20 +610,20 @@ static int imx31_read_page (struct nand_device_s *device, uint32_t page, } { int retval = ERROR_OK; - retval |= imx31_command (device, NAND_CMD_READ0); - retval |= imx31_address (device, 0x00); - retval |= imx31_address (device, page & 0xff); - retval |= imx31_address (device, (page >> 8) & 0xff); - if (device->address_cycles >= 4) - { - retval |= imx31_address (device, (page >> 16) & 0xff); - if (device->address_cycles >= 5) + retval |= imx31_command(nand, NAND_CMD_READ0); + retval |= imx31_address(nand, 0x00); + retval |= imx31_address(nand, page & 0xff); + retval |= imx31_address(nand, (page >> 8) & 0xff); + if (nand->address_cycles >= 4) + { + retval |= imx31_address(nand, (page >> 16) & 0xff); + if (nand->address_cycles >= 5) { - retval |= imx31_address (device, (page >> 24) & 0xff); - retval |= imx31_command (device, NAND_CMD_READSTART); + retval |= imx31_address(nand, (page >> 24) & 0xff); + retval |= imx31_command(nand, NAND_CMD_READSTART); } } - retval |= do_data_output (device); + retval |= do_data_output (nand); if (retval != ERROR_OK) { return retval; @@ -676,7 +643,7 @@ static int imx31_read_page (struct nand_device_s *device, uint32_t page, return ERROR_OK; } -static int test_iomux_settings (target_t * target, uint32_t address, +static int test_iomux_settings (struct target * target, uint32_t address, uint32_t mask, const char *text) { uint32_t register_content; @@ -689,10 +656,10 @@ static int test_iomux_settings (target_t * target, uint32_t address, return ERROR_OK; } -static int initialize_nf_controller (struct nand_device_s *device) +static int initialize_nf_controller (struct nand_device *nand) { - mx3_nf_controller_t *mx3_nf_info = device->controller_priv; - target_t *target = mx3_nf_info->target; + struct mx3_nf_controller *mx3_nf_info = nand->controller_priv; + struct target *target = mx3_nf_info->target; /* * resets NAND flash controller in zero time ? I dont know. */ @@ -742,7 +709,7 @@ static int initialize_nf_controller (struct nand_device_s *device) return ERROR_OK; } -static int get_next_byte_from_sram_buffer (target_t * target, uint8_t * value) +static int get_next_byte_from_sram_buffer (struct target * target, uint8_t * value) { static uint8_t even_byte = 0; /* @@ -780,7 +747,7 @@ static int get_next_byte_from_sram_buffer (target_t * target, uint8_t * value) return ERROR_OK; } -static int get_next_halfword_from_sram_buffer (target_t * target, +static int get_next_halfword_from_sram_buffer (struct target * target, uint16_t * value) { if (in_sram_address > MX3_NF_LAST_BUFFER_ADDR) @@ -797,7 +764,7 @@ static int get_next_halfword_from_sram_buffer (target_t * target, return ERROR_OK; } -static int poll_for_complete_op (target_t * target, const char *text) +static int poll_for_complete_op (struct target * target, const char *text) { uint16_t poll_complete_status; for (int poll_cycle_count = 0; poll_cycle_count < 100; poll_cycle_count++) @@ -817,10 +784,10 @@ static int poll_for_complete_op (target_t * target, const char *text) return ERROR_OK; } -static int validate_target_state (struct nand_device_s *device) +static int validate_target_state (struct nand_device *nand) { - mx3_nf_controller_t *mx3_nf_info = device->controller_priv; - target_t *target = mx3_nf_info->target; + struct mx3_nf_controller *mx3_nf_info = nand->controller_priv; + struct target *target = mx3_nf_info->target; if (target->state != TARGET_HALTED) { @@ -839,10 +806,10 @@ static int validate_target_state (struct nand_device_s *device) return ERROR_OK; } -static int do_data_output (struct nand_device_s *device) +static int do_data_output (struct nand_device *nand) { - mx3_nf_controller_t *mx3_nf_info = device->controller_priv; - target_t *target = mx3_nf_info->target; + struct mx3_nf_controller *mx3_nf_info = nand->controller_priv; + struct target *target = mx3_nf_info->target; switch (mx3_nf_info->fin) { case MX3_NF_FIN_DATAOUT: @@ -900,3 +867,19 @@ static int do_data_output (struct nand_device_s *device) } return ERROR_OK; } + +struct nand_flash_controller imx31_nand_flash_controller = { + .name = "imx31", + .nand_device_command = &imx31_nand_device_command, + .register_commands = &imx31_register_commands, + .init = &imx31_init, + .reset = &imx31_reset, + .command = &imx31_command, + .address = &imx31_address, + .write_data = &imx31_write_data, + .read_data = &imx31_read_data, + .write_page = &imx31_write_page, + .read_page = &imx31_read_page, + .controller_ready = &imx31_controller_ready, + .nand_ready = &imx31_nand_ready, + };