X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Favrf.c;h=1ade45267deffd78d778b464e5e592406137a134;hp=15b8b2794567830e700caeaca57a05db6bf7e749;hb=16b6b5e7a86353dbc0c4823fe3d772c0faca7c1c;hpb=069f88cfac1199657a7e4c9988b0bc86eca99ac9

diff --git a/src/flash/nor/avrf.c b/src/flash/nor/avrf.c
index 15b8b27945..1ade45267d 100644
--- a/src/flash/nor/avrf.c
+++ b/src/flash/nor/avrf.c
@@ -22,7 +22,6 @@
 #endif
 
 #include "imp.h"
-#include "avrf.h"
 #include <target/avrt.h>
 
 
@@ -50,6 +49,22 @@
 #define AVR_JTAG_REG_ProgrammingCommand_Len			15
 #define AVR_JTAG_REG_FlashDataByte_Len				16
 
+struct avrf_type
+{
+	char name[15];
+	uint16_t chip_id;
+	int flash_page_size;
+	int flash_page_num;
+	int eeprom_page_size;
+	int eeprom_page_num;
+};
+
+struct avrf_flash_bank
+{
+	int ppage_size;
+	int probed;
+};
+
 static struct avrf_type avft_chips_info[] =
 {
 /*	name, chip_id,	flash_page_size, flash_page_num,
@@ -59,19 +74,6 @@ static struct avrf_type avft_chips_info[] =
 	{"at90can128",	0x9781, 256, 512, 8, 512},
 };
 
-int avr_jtag_sendinstr(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out);
-int avr_jtag_senddat(struct jtag_tap *tap, uint32_t *dr_in, uint32_t dr_out, int len);
-
-int mcu_write_ir(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, int rti);
-int mcu_write_dr(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, int dr_len, int rti);
-int mcu_write_ir_u8(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti);
-int mcu_write_dr_u8(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
-int mcu_write_ir_u16(struct jtag_tap *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti);
-int mcu_write_dr_u16(struct jtag_tap *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti);
-int mcu_write_ir_u32(struct jtag_tap *tap, uint32_t *ir_in, uint32_t ir_out, int ir_len, int rti);
-int mcu_write_dr_u32(struct jtag_tap *tap, uint32_t *ir_in, uint32_t ir_out, int dr_len, int rti);
-int mcu_execute_queue(void);
-
 /* avr program functions */
 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
 {
@@ -189,8 +191,7 @@ FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
 
 	if (CMD_ARGC < 6)
 	{
-		LOG_WARNING("incomplete flash_bank avr configuration");
-		return ERROR_FLASH_BANK_INVALID;
+		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
 	avrf_info = malloc(sizeof(struct avrf_flash_bank));
@@ -324,6 +325,12 @@ static int avrf_probe(struct flash_bank *bank)
 
 	if (avr_info != NULL)
 	{
+		if (bank->sectors)
+		{
+			free(bank->sectors);
+			bank->sectors = NULL;
+		}
+
 		// chip found
 		bank->base = 0x00000000;
 		bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
@@ -443,8 +450,7 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command)
 
 	if (CMD_ARGC < 1)
 	{
-		command_print(CMD_CTX, "avr mass_erase <bank>");
-		return ERROR_OK;
+		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
 	struct flash_bank *bank;
@@ -474,6 +480,7 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command)
 static const struct command_registration avrf_exec_command_handlers[] = {
 	{
 		.name = "mass_erase",
+		.usage = "<bank>",
 		.handler = avrf_handle_mass_erase_command,
 		.mode = COMMAND_EXEC,
 		.help = "erase entire device",
@@ -497,6 +504,7 @@ struct flash_driver avr_flash = {
 	.erase = avrf_erase,
 	.protect = avrf_protect,
 	.write = avrf_write,
+	.read = default_flash_read,
 	.probe = avrf_probe,
 	.auto_probe = avrf_auto_probe,
 	.erase_check = default_flash_mem_blank_check,