X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fkinetis.c;h=99fafec9c6bdb88859136c643f728f25d78fd0ea;hp=5b618c03e30d7a4b8a0d45ea932a81156a7058e9;hb=2a1821780d153854e69282d4610fe69f302e19fa;hpb=c161b81b0f60833d6723e59eb6baefe27336ee62 diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c index 5b618c03e3..99fafec9c6 100644 --- a/src/flash/nor/kinetis.c +++ b/src/flash/nor/kinetis.c @@ -11,6 +11,9 @@ * Copyright (C) 2013 Nemui Trinomius * * nemuisan_kawausogasuki@live.jp * * * + * Copyright (C) 2015 Tomas Vanek * + * vanekt@fbl.cz * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -96,8 +99,9 @@ #define FTFx_CMD_LWORDPROG 0x06 #define FTFx_CMD_SECTERASE 0x09 #define FTFx_CMD_SECTWRITE 0x0b -#define FTFx_CMD_SETFLEXRAM 0x81 #define FTFx_CMD_MASSERASE 0x44 +#define FTFx_CMD_PGMPART 0x80 +#define FTFx_CMD_SETFLEXRAM 0x81 /* The older Kinetis K series uses the following SDID layout : * Bit 31-16 : 0 @@ -984,11 +988,41 @@ static int kinetis_erase(struct flash_bank *bank, int first, int last) return ERROR_OK; } +static int kinetis_make_ram_ready(struct target *target) +{ + int result; + uint8_t ftfx_fstat; + uint8_t ftfx_fcnfg; + + /* check if ram ready */ + result = target_read_memory(target, FTFx_FCNFG, 1, 1, &ftfx_fcnfg); + if (result != ERROR_OK) + return result; + + if (ftfx_fcnfg & (1 << 1)) + return ERROR_OK; /* ram ready */ + + /* make flex ram available */ + result = kinetis_ftfx_command(target, FTFx_CMD_SETFLEXRAM, 0x00ff0000, + 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat); + if (result != ERROR_OK) + return ERROR_FLASH_OPERATION_FAILED; + + /* check again */ + result = target_read_memory(target, FTFx_FCNFG, 1, 1, &ftfx_fcnfg); + if (result != ERROR_OK) + return result; + + if (ftfx_fcnfg & (1 << 1)) + return ERROR_OK; /* ram ready */ + + return ERROR_FLASH_OPERATION_FAILED; +} + static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { unsigned int i, result, fallback = 0; - uint8_t buf[8]; uint32_t wc; struct kinetis_flash_bank *kinfo = bank->driver_priv; uint8_t *new_buffer = NULL; @@ -1002,36 +1036,16 @@ static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer, /* fallback to longword write */ fallback = 1; LOG_WARNING("This device supports Program Longword execution only."); - LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset); - - } else if (kinfo->flash_class == FC_FLEX_NVM) { - uint8_t ftfx_fstat; - - LOG_DEBUG("flash write into FlexNVM @%08" PRIX32, offset); - - /* make flex ram available */ - result = kinetis_ftfx_command(bank->target, FTFx_CMD_SETFLEXRAM, 0x00ff0000, - 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat); - - if (result != ERROR_OK) - return ERROR_FLASH_OPERATION_FAILED; - - /* check if ram ready */ - result = target_read_memory(bank->target, FTFx_FCNFG, 1, 1, buf); - - if (result != ERROR_OK) - return result; - - if (!(buf[0] & (1 << 1))) { - /* fallback to longword write */ + } else { + result = kinetis_make_ram_ready(bank->target); + if (result != ERROR_OK) { fallback = 1; - - LOG_WARNING("ram not ready, fallback to slow longword write (FCNFG: %02X)", buf[0]); + LOG_WARNING("FlexRAM not ready, fallback to slow longword write."); } - } else { - LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset); } + LOG_DEBUG("flash write @08%" PRIX32, offset); + /* program section command */ if (fallback == 0) { @@ -1173,7 +1187,7 @@ static int kinetis_read_part_info(struct flash_bank *bank) int result, i; uint32_t offset = 0; uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg1_depart; - uint8_t fcfg2_pflsh; + uint8_t fcfg2_maxaddr0, fcfg2_pflsh, fcfg2_maxaddr1; uint32_t nvm_size = 0, pf_size = 0, df_size = 0, ee_size = 0; unsigned num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0, first_nvm_bank = 0, pflash_sector_size_bytes = 0, nvm_sector_size_bytes = 0; @@ -1283,7 +1297,7 @@ static int kinetis_read_part_info(struct flash_bank *bank) || (kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN512) { /* K22 with new-style SDID - smaller pflash with FTFA, 2kB sectors */ pflash_sector_size_bytes = 2<<10; - num_blocks = 2; /* 1 or 2 blocks */ + /* autodetect 1 or 2 blocks */ kinfo->flash_support = FS_PROGRAM_LONGWORD; break; } @@ -1335,7 +1349,7 @@ static int kinetis_read_part_info(struct flash_bank *bank) /* KL-series */ pflash_sector_size_bytes = 1<<10; nvm_sector_size_bytes = 1<<10; - num_blocks = 1; + /* autodetect 1 or 2 blocks */ kinfo->flash_support = FS_PROGRAM_LONGWORD; break; default: @@ -1365,6 +1379,18 @@ static int kinetis_read_part_info(struct flash_bank *bank) fcfg1_depart = (uint8_t)((kinfo->sim_fcfg1 >> 8) & 0x0f); fcfg2_pflsh = (uint8_t)((kinfo->sim_fcfg2 >> 23) & 0x01); + fcfg2_maxaddr0 = (uint8_t)((kinfo->sim_fcfg2 >> 24) & 0x7f); + fcfg2_maxaddr1 = (uint8_t)((kinfo->sim_fcfg2 >> 16) & 0x7f); + + if (num_blocks == 0) + num_blocks = fcfg2_maxaddr1 ? 2 : 1; + else if (fcfg2_maxaddr1 == 0 && num_blocks >= 2) { + num_blocks = 1; + LOG_WARNING("MAXADDR1 is zero, number of flash banks adjusted to 1"); + } else if (fcfg2_maxaddr1 != 0 && num_blocks == 1) { + num_blocks = 2; + LOG_WARNING("MAXADDR1 is non zero, number of flash banks adjusted to 2"); + } /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */ if (!fcfg2_pflsh) { @@ -1441,12 +1467,22 @@ static int kinetis_read_part_info(struct flash_bank *bank) pf_size = 1 << (14 + (fcfg1_pfsize >> 1)); break; case 0x0f: - if (pflash_sector_size_bytes >= 4<<10) - pf_size = 1024<<10; - else if (fcfg2_pflsh) - pf_size = 512<<10; + /* a peculiar case: Freescale states different sizes for 0xf + * K02P64M100SFARM 128 KB ... duplicate of code 0x7 + * K22P121M120SF8RM 256 KB ... duplicate of code 0x9 + * K22P121M120SF7RM 512 KB ... duplicate of code 0xb + * K22P100M120SF5RM 1024 KB ... duplicate of code 0xd + * K26P169M180SF5RM 2048 KB ... the only unique value + * fcfg2_maxaddr0 seems to be the only clue to pf_size + * Checking fcfg2_maxaddr0 later in this routine is pointless then + */ + if (fcfg2_pflsh) + pf_size = ((uint32_t)fcfg2_maxaddr0 << 13) * num_blocks; else - pf_size = 256<<10; + pf_size = ((uint32_t)fcfg2_maxaddr0 << 13) * num_blocks / 2; + if (pf_size != 2048<<10) + LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %u KB", pf_size>>10); + break; default: pf_size = 0; @@ -1518,6 +1554,20 @@ static int kinetis_read_part_info(struct flash_bank *bank) return ERROR_FLASH_BANK_INVALID; } + if (bank->bank_number == 0 && ((uint32_t)fcfg2_maxaddr0 << 13) != bank->size) + LOG_WARNING("MAXADDR0 0x%02" PRIx8 " check failed," + " please report to OpenOCD mailing list", fcfg2_maxaddr0); + if (fcfg2_pflsh) { + if (bank->bank_number == 1 && ((uint32_t)fcfg2_maxaddr1 << 13) != bank->size) + LOG_WARNING("MAXADDR1 0x%02" PRIx8 " check failed," + " please report to OpenOCD mailing list", fcfg2_maxaddr1); + } else { + if ((unsigned)bank->bank_number == first_nvm_bank + && ((uint32_t)fcfg2_maxaddr1 << 13) != df_size) + LOG_WARNING("FlexNVM MAXADDR1 0x%02" PRIx8 " check failed," + " please report to OpenOCD mailing list", fcfg2_maxaddr1); + } + if (bank->sectors) { free(bank->sectors); bank->sectors = NULL; @@ -1650,6 +1700,146 @@ static int kinetis_blank_check(struct flash_bank *bank) return ERROR_OK; } + +COMMAND_HANDLER(kinetis_nvm_partition) +{ + int result, i; + unsigned long par, log2 = 0, ee1 = 0, ee2 = 0; + enum { SHOW_INFO, DF_SIZE, EEBKP_SIZE } sz_type = SHOW_INFO; + bool enable; + uint8_t ftfx_fstat; + uint8_t load_flex_ram = 1; + uint8_t ee_size_code = 0x3f; + uint8_t flex_nvm_partition_code = 0; + uint8_t ee_split = 3; + struct target *target = get_current_target(CMD_CTX); + struct flash_bank *bank; + struct kinetis_flash_bank *kinfo; + uint32_t sim_fcfg1; + + if (CMD_ARGC >= 2) { + if (strcmp(CMD_ARGV[0], "dataflash") == 0) + sz_type = DF_SIZE; + else if (strcmp(CMD_ARGV[0], "eebkp") == 0) + sz_type = EEBKP_SIZE; + + par = strtoul(CMD_ARGV[1], NULL, 10); + while (par >> (log2 + 3)) + log2++; + } + switch (sz_type) { + case SHOW_INFO: + result = target_read_u32(target, SIM_FCFG1, &sim_fcfg1); + if (result != ERROR_OK) + return result; + + flex_nvm_partition_code = (uint8_t)((sim_fcfg1 >> 8) & 0x0f); + switch (flex_nvm_partition_code) { + case 0: + command_print(CMD_CTX, "No EEPROM backup, data flash only"); + break; + case 1: + case 2: + case 3: + case 4: + case 5: + case 6: + command_print(CMD_CTX, "EEPROM backup %d KB", 4 << flex_nvm_partition_code); + break; + case 8: + command_print(CMD_CTX, "No data flash, EEPROM backup only"); + break; + case 0x9: + case 0xA: + case 0xB: + case 0xC: + case 0xD: + case 0xE: + command_print(CMD_CTX, "data flash %d KB", 4 << (flex_nvm_partition_code & 7)); + break; + case 0xf: + command_print(CMD_CTX, "No EEPROM backup, data flash only (DEPART not set)"); + break; + default: + command_print(CMD_CTX, "Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code); + } + return ERROR_OK; + + case DF_SIZE: + flex_nvm_partition_code = 0x8 | log2; + break; + + case EEBKP_SIZE: + flex_nvm_partition_code = log2; + break; + } + + if (CMD_ARGC == 3) + ee1 = ee2 = strtoul(CMD_ARGV[2], NULL, 10) / 2; + else if (CMD_ARGC >= 4) { + ee1 = strtoul(CMD_ARGV[2], NULL, 10); + ee2 = strtoul(CMD_ARGV[3], NULL, 10); + } + + enable = ee1 + ee2 > 0; + if (enable) { + for (log2 = 2; ; log2++) { + if (ee1 + ee2 == (16u << 10) >> log2) + break; + if (ee1 + ee2 > (16u << 10) >> log2 || log2 >= 9) { + LOG_ERROR("Unsupported EEPROM size"); + return ERROR_FLASH_OPERATION_FAILED; + } + } + + if (ee1 * 3 == ee2) + ee_split = 1; + else if (ee1 * 7 == ee2) + ee_split = 0; + else if (ee1 != ee2) { + LOG_ERROR("Unsupported EEPROM sizes ratio"); + return ERROR_FLASH_OPERATION_FAILED; + } + + ee_size_code = log2 | ee_split << 4; + } + + if (CMD_ARGC >= 5) + COMMAND_PARSE_ON_OFF(CMD_ARGV[4], enable); + if (enable) + load_flex_ram = 0; + + LOG_INFO("DEPART 0x%" PRIx8 ", EEPROM size code 0x%" PRIx8, + flex_nvm_partition_code, ee_size_code); + + if (target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); + return ERROR_TARGET_NOT_HALTED; + } + + result = kinetis_ftfx_command(target, FTFx_CMD_PGMPART, load_flex_ram, + ee_size_code, flex_nvm_partition_code, 0, 0, + 0, 0, 0, 0, &ftfx_fstat); + if (result != ERROR_OK) + return result; + + command_print(CMD_CTX, "FlexNVM partition set. Please reset MCU."); + + for (i = 1; i < 4; i++) { + bank = get_flash_bank_by_num_noprobe(i); + if (bank == NULL) + break; + + kinfo = bank->driver_priv; + if (kinfo && kinfo->flash_class == FC_FLEX_NVM) + kinfo->probed = false; /* re-probe before next use */ + } + + command_print(CMD_CTX, "FlexNVM banks will be re-probed to set new data flash size."); + return ERROR_OK; +} + + static const struct command_registration kinetis_securtiy_command_handlers[] = { { .name = "check_security", @@ -1683,6 +1873,14 @@ static const struct command_registration kinetis_exec_command_handlers[] = { .usage = "", .handler = kinetis_disable_wdog_handler, }, + { + .name = "nvm_partition", + .mode = COMMAND_EXEC, + .help = "Show/set data flash or EEPROM backup size in kilobytes," + " set two EEPROM sizes in bytes and FlexRAM loading during reset", + .usage = "('info'|'dataflash' size|'eebkp' size) [eesize1 eesize2] ['on'|'off']", + .handler = kinetis_nvm_partition, + }, COMMAND_REGISTRATION_DONE };