X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Flpcspifi.c;h=19d754b0f22d2aacb96a2cddd83ba9f08e1aa866;hp=757d6d1953155dc1ae391332646838175d457a1b;hb=80ca927ebc2bb1ca18aff70215222d55c1f196f8;hpb=516719b6b8ac35c14396f9a0cbdc355be4e45c10
diff --git a/src/flash/nor/lpcspifi.c b/src/flash/nor/lpcspifi.c
index 757d6d1953..19d754b0f2 100644
--- a/src/flash/nor/lpcspifi.c
+++ b/src/flash/nor/lpcspifi.c
@@ -13,9 +13,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * along with this program. If not, see . *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -44,6 +42,10 @@
#define SSP_PROBE_TIMEOUT (100)
#define SSP_MAX_TIMEOUT (3000)
+/* Size of the stack to alloc in the working area for the execution of
+ * the ROM spifi_init() function */
+#define SPIFI_INIT_STACK_SIZE 512
+
struct lpcspifi_flash_bank {
int probed;
uint32_t ssp_base;
@@ -51,22 +53,7 @@ struct lpcspifi_flash_bank {
uint32_t ioconfig_base;
uint32_t bank_num;
uint32_t max_spi_clock_mhz;
- struct flash_device *dev;
-};
-
-struct lpcspifi_target {
- char *name;
- uint32_t tap_idcode;
- uint32_t spifi_base;
- uint32_t ssp_base;
- uint32_t io_base;
- uint32_t ioconfig_base; /* base address for the port word pin registers */
-};
-
-static struct lpcspifi_target target_devices[] = {
- /* name, tap_idcode, spifi_base, ssp_base, io_base, ioconfig_base */
- { "LPC43xx/18xx", 0x4ba00477, 0x14000000, 0x40083000, 0x400F4000, 0x40086000 },
- { NULL, 0, 0, 0, 0, 0 }
+ const struct flash_device *dev;
};
/* flash_bank lpcspifi
@@ -119,7 +106,7 @@ static int ssp_setcs(struct target *target, uint32_t io_base, unsigned int value
* and the controller is idle. */
static int poll_ssp_busy(struct target *target, uint32_t ssp_base, int timeout)
{
- long long endtime;
+ int64_t endtime;
uint32_t value;
int retval;
@@ -151,7 +138,7 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank)
uint32_t ssp_base = lpcspifi_info->ssp_base;
struct armv7m_algorithm armv7m_info;
struct working_area *spifi_init_algorithm;
- struct reg_param reg_params[1];
+ struct reg_param reg_params[2];
int retval = ERROR_OK;
LOG_DEBUG("Uninitializing LPC43xx SSP");
@@ -182,24 +169,24 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank)
};
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARMV7M_MODE_ANY;
+ armv7m_info.core_mode = ARM_MODE_THREAD;
LOG_DEBUG("Allocating working area for SPIFI init algorithm");
/* Get memory for spifi initialization algorithm */
- retval = target_alloc_working_area(target, sizeof(spifi_init_code),
- &spifi_init_algorithm);
+ retval = target_alloc_working_area(target, sizeof(spifi_init_code)
+ + SPIFI_INIT_STACK_SIZE, &spifi_init_algorithm);
if (retval != ERROR_OK) {
LOG_ERROR("Insufficient working area to initialize SPIFI "\
"module. You must allocate at least %zdB of working "\
"area in order to use this driver.",
- sizeof(spifi_init_code)
+ sizeof(spifi_init_code) + SPIFI_INIT_STACK_SIZE
);
return retval;
}
- LOG_DEBUG("Writing algorithm to working area at 0x%08x",
+ LOG_DEBUG("Writing algorithm to working area at " TARGET_ADDR_FMT,
spifi_init_algorithm->address);
/* Write algorithm to working area */
retval = target_write_buffer(target,
@@ -214,6 +201,8 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank)
}
init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* spifi clk speed */
+ /* the spifi_init() rom API makes use of the stack */
+ init_reg_param(®_params[1], "sp", 32, PARAM_OUT);
/* For now, the algorithm will set up the SPIFI module
* @ the IRC clock speed. In the future, it could be made
@@ -221,10 +210,13 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank)
* already configured them in order to speed up memory-
* mapped reads. */
buf_set_u32(reg_params[0].value, 0, 32, 12);
+ /* valid stack pointer */
+ buf_set_u32(reg_params[1].value, 0, 32, (spifi_init_algorithm->address +
+ sizeof(spifi_init_code) + SPIFI_INIT_STACK_SIZE) & ~7UL);
/* Run the algorithm */
LOG_DEBUG("Running SPIFI init algorithm");
- retval = target_run_algorithm(target, 0 , NULL, 1, reg_params,
+ retval = target_run_algorithm(target, 0 , NULL, 2, reg_params,
spifi_init_algorithm->address,
spifi_init_algorithm->address + sizeof(spifi_init_code) - 2,
1000, &armv7m_info);
@@ -235,6 +227,7 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank)
target_free_working_area(target, spifi_init_algorithm);
destroy_reg_param(®_params[0]);
+ destroy_reg_param(®_params[1]);
return retval;
}
@@ -332,7 +325,7 @@ static int wait_till_ready(struct flash_bank *bank, int timeout)
{
uint32_t status;
int retval;
- long long endtime;
+ int64_t endtime;
endtime = timeval_ms() + timeout;
do {
@@ -394,6 +387,9 @@ static int lpcspifi_bulk_erase(struct flash_bank *bank)
uint32_t value;
int retval = ERROR_OK;
+ if (lpcspifi_info->dev->chip_erase_cmd == 0x00)
+ return ERROR_FLASH_OPER_UNSUPPORTED;
+
retval = lpcspifi_set_sw_mode(bank);
if (retval == ERROR_OK)
@@ -467,6 +463,9 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last)
LOG_WARNING("Bulk flash erase failed. Falling back to sector-by-sector erase.");
}
+ if (lpcspifi_info->dev->erase_cmd == 0x00)
+ return ERROR_FLASH_OPER_UNSUPPORTED;
+
retval = lpcspifi_set_hw_mode(bank);
if (retval != ERROR_OK)
return retval;
@@ -519,7 +518,7 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last)
};
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARMV7M_MODE_ANY;
+ armv7m_info.core_mode = ARM_MODE_THREAD;
/* Get memory for spifi initialization algorithm */
@@ -581,7 +580,7 @@ static int lpcspifi_protect(struct flash_bank *bank, int set,
return ERROR_OK;
}
-static int lpcspifi_write(struct flash_bank *bank, uint8_t *buffer,
+static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
@@ -620,7 +619,9 @@ static int lpcspifi_write(struct flash_bank *bank, uint8_t *buffer,
}
}
- page_size = lpcspifi_info->dev->pagesize;
+ /* if no valid page_size, use reasonable default */
+ page_size = lpcspifi_info->dev->pagesize ?
+ lpcspifi_info->dev->pagesize : SPIFLASH_DEF_PAGESIZE;
retval = lpcspifi_set_hw_mode(bank);
if (retval != ERROR_OK)
@@ -678,7 +679,8 @@ static int lpcspifi_write(struct flash_bank *bank, uint8_t *buffer,
0x00, 0xf0, 0x02, 0xb8, 0x4f, 0xf0, 0x00, 0x08,
0x4f, 0xf4, 0x80, 0x4a, 0xc4, 0xf2, 0x0f, 0x0a,
0xca, 0xf8, 0xab, 0x80, 0x70, 0x47, 0x00, 0x20,
- 0x50, 0x60, 0x30, 0x46, 0x00, 0xbe, 0xff, 0xff
+ 0x50, 0x60, 0xff, 0xf7, 0xef, 0xff, 0x30, 0x46,
+ 0x00, 0xbe, 0xff, 0xff
};
if (target_alloc_working_area(target, sizeof(lpcspifi_flash_write_code),
@@ -687,7 +689,7 @@ static int lpcspifi_write(struct flash_bank *bank, uint8_t *buffer,
" a working area > %zdB in order to write to SPIFI flash.",
sizeof(lpcspifi_flash_write_code));
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- };
+ }
retval = target_write_buffer(target, write_algorithm->address,
sizeof(lpcspifi_flash_write_code),
@@ -715,7 +717,7 @@ static int lpcspifi_write(struct flash_bank *bank, uint8_t *buffer,
LOG_WARNING("Working area size is limited; flash writes may be"\
" slow. Increase working area size to at least %zdB"\
" to reduce write times.",
- sizeof(lpcspifi_flash_write_code) + page_size
+ (size_t)(sizeof(lpcspifi_flash_write_code) + page_size)
);
else if (fifo_size > 0x2000) /* Beyond this point, we start to get diminishing returns */
fifo_size = 0x2000;
@@ -723,10 +725,10 @@ static int lpcspifi_write(struct flash_bank *bank, uint8_t *buffer,
if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) {
target_free_working_area(target, write_algorithm);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- };
+ }
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARMV7M_MODE_ANY;
+ armv7m_info.core_mode = ARM_MODE_THREAD;
init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */
init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer end */
@@ -774,6 +776,7 @@ static int lpcspifi_read_flash_id(struct flash_bank *bank, uint32_t *id)
uint32_t ssp_base = lpcspifi_info->ssp_base;
uint32_t io_base = lpcspifi_info->io_base;
uint32_t value;
+ uint8_t id_buf[3] = {0, 0, 0};
int retval;
if (target->state != TARGET_HALTED) {
@@ -808,7 +811,7 @@ static int lpcspifi_read_flash_id(struct flash_bank *bank, uint32_t *id)
if (retval == ERROR_OK)
retval = ssp_read_reg(target, ssp_base, SSP_DATA, &value);
if (retval == ERROR_OK)
- ((uint8_t *)id)[0] = value;
+ id_buf[0] = value;
/* Dummy write to clock in data */
if (retval == ERROR_OK)
@@ -818,7 +821,7 @@ static int lpcspifi_read_flash_id(struct flash_bank *bank, uint32_t *id)
if (retval == ERROR_OK)
retval = ssp_read_reg(target, ssp_base, SSP_DATA, &value);
if (retval == ERROR_OK)
- ((uint8_t *)id)[1] = value;
+ id_buf[1] = value;
/* Dummy write to clock in data */
if (retval == ERROR_OK)
@@ -828,51 +831,34 @@ static int lpcspifi_read_flash_id(struct flash_bank *bank, uint32_t *id)
if (retval == ERROR_OK)
retval = ssp_read_reg(target, ssp_base, SSP_DATA, &value);
if (retval == ERROR_OK)
- ((uint8_t *)id)[2] = value;
+ id_buf[2] = value;
if (retval == ERROR_OK)
retval = ssp_setcs(target, io_base, 1);
+ if (retval == ERROR_OK)
+ *id = id_buf[2] << 16 | id_buf[1] << 8 | id_buf[0];
return retval;
}
static int lpcspifi_probe(struct flash_bank *bank)
{
- struct target *target = bank->target;
struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
- uint32_t ssp_base;
- uint32_t io_base;
- uint32_t ioconfig_base;
struct flash_sector *sectors;
uint32_t id = 0; /* silence uninitialized warning */
- struct lpcspifi_target *target_device;
int retval;
+ uint32_t sectorsize;
/* If we've already probed, we should be fine to skip this time. */
if (lpcspifi_info->probed)
return ERROR_OK;
lpcspifi_info->probed = 0;
- for (target_device = target_devices ; target_device->name ; ++target_device)
- if (target_device->tap_idcode == target->tap->idcode)
- break;
- if (!target_device->name) {
- LOG_ERROR("Device ID 0x%" PRIx32 " is not known as SPIFI capable",
- target->tap->idcode);
- return ERROR_FAIL;
- }
-
- ssp_base = target_device->ssp_base;
- io_base = target_device->io_base;
- ioconfig_base = target_device->ioconfig_base;
- lpcspifi_info->ssp_base = ssp_base;
- lpcspifi_info->io_base = io_base;
- lpcspifi_info->ioconfig_base = ioconfig_base;
+ lpcspifi_info->ssp_base = 0x40083000;
+ lpcspifi_info->io_base = 0x400F4000;
+ lpcspifi_info->ioconfig_base = 0x40086000;
lpcspifi_info->bank_num = bank->bank_number;
- LOG_DEBUG("Valid SPIFI on device %s at address 0x%" PRIx32,
- target_device->name, bank->base);
-
/* read and decode flash ID; returns in SW mode */
retval = lpcspifi_read_flash_id(bank, &id);
if (retval != ERROR_OK)
@@ -883,7 +869,7 @@ static int lpcspifi_probe(struct flash_bank *bank)
return retval;
lpcspifi_info->dev = NULL;
- for (struct flash_device *p = flash_devices; p->name ; p++)
+ for (const struct flash_device *p = flash_devices; p->name ; p++)
if (p->device_id == id) {
lpcspifi_info->dev = p;
break;
@@ -899,10 +885,17 @@ static int lpcspifi_probe(struct flash_bank *bank)
/* Set correct size value */
bank->size = lpcspifi_info->dev->size_in_bytes;
+ if (bank->size <= (1UL << 16))
+ LOG_WARNING("device needs 2-byte addresses - not implemented");
+ if (bank->size > (1UL << 24))
+ LOG_WARNING("device needs paging or 4-byte addresses - not implemented");
+
+ /* if no sectors, treat whole bank as single sector */
+ sectorsize = lpcspifi_info->dev->sectorsize ?
+ lpcspifi_info->dev->sectorsize : lpcspifi_info->dev->size_in_bytes;
/* create and fill sectors array */
- bank->num_sectors =
- lpcspifi_info->dev->size_in_bytes / lpcspifi_info->dev->sectorsize;
+ bank->num_sectors = lpcspifi_info->dev->size_in_bytes / sectorsize;
sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
if (sectors == NULL) {
LOG_ERROR("not enough memory");
@@ -910,10 +903,10 @@ static int lpcspifi_probe(struct flash_bank *bank)
}
for (int sector = 0; sector < bank->num_sectors; sector++) {
- sectors[sector].offset = sector * lpcspifi_info->dev->sectorsize;
- sectors[sector].size = lpcspifi_info->dev->sectorsize;
+ sectors[sector].offset = sector * sectorsize;
+ sectors[sector].size = sectorsize;
sectors[sector].is_erased = -1;
- sectors[sector].is_protected = 1;
+ sectors[sector].is_protected = 0;
}
bank->sectors = sectors;
@@ -947,13 +940,13 @@ static int get_lpcspifi_info(struct flash_bank *bank, char *buf, int buf_size)
}
snprintf(buf, buf_size, "\nSPIFI flash information:\n"
- " Device \'%s\' (ID 0x%08x)\n",
+ " Device \'%s\' (ID 0x%08" PRIx32 ")\n",
lpcspifi_info->dev->name, lpcspifi_info->dev->device_id);
return ERROR_OK;
}
-struct flash_driver lpcspifi_flash = {
+const struct flash_driver lpcspifi_flash = {
.name = "lpcspifi",
.flash_bank_command = lpcspifi_flash_bank_command,
.erase = lpcspifi_erase,
@@ -965,4 +958,5 @@ struct flash_driver lpcspifi_flash = {
.erase_check = default_flash_blank_check,
.protect_check = lpcspifi_protect_check,
.info = get_lpcspifi_info,
+ .free_driver_priv = default_flash_free_driver_priv,
};