X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstm32f1x.c;h=faada9a6121fa31a897480e1572679b526c45cf9;hp=1b67ff0331d0a07619a5cd2da202307261765d53;hb=d92773b2057ef163cd062b2408b99bdc3404f905;hpb=829e532c3355656b40fa6caefa8f030b6fd765b1
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 1b67ff0331..faada9a612 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -19,9 +19,7 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
+ * along with this program. If not, see . *
***************************************************************************/
#ifdef HAVE_CONFIG_H
@@ -130,7 +128,7 @@ struct stm32x_flash_bank {
static int stm32x_mass_erase(struct flash_bank *bank);
static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id);
-static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
+static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count);
/* flash bank stm32x 0 0
@@ -561,7 +559,7 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
return stm32x_write_options(bank);
}
-static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
+static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
@@ -574,45 +572,8 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
struct armv7m_algorithm armv7m_info;
int retval = ERROR_OK;
- /* see contrib/loaders/flash/stm32f1x.S for src */
-
static const uint8_t stm32x_flash_write_code[] = {
- /* #define STM32_FLASH_SR_OFFSET 0x0C */
- /* wait_fifo: */
- 0x16, 0x68, /* ldr r6, [r2, #0] */
- 0x00, 0x2e, /* cmp r6, #0 */
- 0x18, 0xd0, /* beq exit */
- 0x55, 0x68, /* ldr r5, [r2, #4] */
- 0xb5, 0x42, /* cmp r5, r6 */
- 0xf9, 0xd0, /* beq wait_fifo */
- 0x2e, 0x88, /* ldrh r6, [r5, #0] */
- 0x26, 0x80, /* strh r6, [r4, #0] */
- 0x02, 0x35, /* adds r5, #2 */
- 0x02, 0x34, /* adds r4, #2 */
- /* busy: */
- 0xc6, 0x68, /* ldr r6, [r0, #STM32_FLASH_SR_OFFSET] */
- 0x01, 0x27, /* movs r7, #1 */
- 0x3e, 0x42, /* tst r6, r7 */
- 0xfb, 0xd1, /* bne busy */
- 0x14, 0x27, /* movs r7, #0x14 */
- 0x3e, 0x42, /* tst r6, r7 */
- 0x08, 0xd1, /* bne error */
- 0x9d, 0x42, /* cmp r5, r3 */
- 0x01, 0xd3, /* bcc no_wrap */
- 0x15, 0x46, /* mov r5, r2 */
- 0x08, 0x35, /* adds r5, #8 */
- /* no_wrap: */
- 0x55, 0x60, /* str r5, [r2, #4] */
- 0x01, 0x39, /* subs r1, r1, #1 */
- 0x00, 0x29, /* cmp r1, #0 */
- 0x02, 0xd0, /* beq exit */
- 0xe5, 0xe7, /* b wait_fifo */
- /* error: */
- 0x00, 0x20, /* movs r0, #0 */
- 0x50, 0x60, /* str r0, [r2, #4] */
- /* exit: */
- 0x30, 0x46, /* mov r0, r6 */
- 0x00, 0xbe, /* bkpt #0 */
+#include "../../../contrib/loaders/flash/stm32/stm32f1x.inc"
};
/* flash write code */
@@ -620,12 +581,14 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
&write_algorithm) != ERROR_OK) {
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- };
+ }
retval = target_write_buffer(target, write_algorithm->address,
sizeof(stm32x_flash_write_code), stm32x_flash_write_code);
- if (retval != ERROR_OK)
+ if (retval != ERROR_OK) {
+ target_free_working_area(target, write_algorithm);
return retval;
+ }
/* memory buffer */
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
@@ -639,7 +602,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
LOG_WARNING("no large enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
- };
+ }
init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (halfword-16bit) */
@@ -692,7 +655,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
return retval;
}
-static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
+static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
@@ -720,7 +683,7 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
}
LOG_INFO("odd number of bytes to write, padding with 0xff");
buffer = memcpy(new_buffer, buffer, count);
- buffer[count++] = 0xff;
+ new_buffer[count++] = 0xff;
}
uint32_t words_remaining = count / 2;
@@ -894,7 +857,7 @@ static int stm32x_probe(struct flash_bank *bank)
stm32x_info->ppage_size = 4;
max_flash_size_in_kb = 128;
break;
- case 0x422: /* stm32f30x */
+ case 0x422: /* stm32f302/3xb/c */
page_size = 2048;
stm32x_info->ppage_size = 2;
max_flash_size_in_kb = 256;
@@ -902,6 +865,14 @@ static int stm32x_probe(struct flash_bank *bank)
stm32x_info->option_offset = 6;
stm32x_info->default_rdp = 0x55AA;
break;
+ case 0x446: /* stm32f303xD/E */
+ page_size = 2048;
+ stm32x_info->ppage_size = 2;
+ max_flash_size_in_kb = 512;
+ stm32x_info->user_data_offset = 16;
+ stm32x_info->option_offset = 6;
+ stm32x_info->default_rdp = 0x55AA;
+ break;
case 0x428: /* value line High density */
page_size = 2048;
stm32x_info->ppage_size = 4;
@@ -921,8 +892,18 @@ static int stm32x_probe(struct flash_bank *bank)
stm32x_info->option_offset = 6;
stm32x_info->default_rdp = 0x55AA;
break;
+ case 0x438: /* stm32f33x */
+ case 0x439: /* stm32f302x6/8 */
+ page_size = 2048;
+ stm32x_info->ppage_size = 2;
+ max_flash_size_in_kb = 64;
+ stm32x_info->user_data_offset = 16;
+ stm32x_info->option_offset = 6;
+ stm32x_info->default_rdp = 0x55AA;
+ break;
case 0x440: /* stm32f05x */
case 0x444: /* stm32f03x */
+ case 0x445: /* stm32f04x */
page_size = 1024;
stm32x_info->ppage_size = 4;
max_flash_size_in_kb = 64;
@@ -931,9 +912,10 @@ static int stm32x_probe(struct flash_bank *bank)
stm32x_info->default_rdp = 0x55AA;
break;
case 0x448: /* stm32f07x */
+ case 0x442: /* stm32f09x */
page_size = 2048;
stm32x_info->ppage_size = 4;
- max_flash_size_in_kb = 128;
+ max_flash_size_in_kb = 256;
stm32x_info->user_data_offset = 16;
stm32x_info->option_offset = 6;
stm32x_info->default_rdp = 0x55AA;
@@ -1022,6 +1004,21 @@ COMMAND_HANDLER(stm32x_handle_part_id_command)
}
#endif
+static const char *get_stm32f0_revision(uint16_t rev_id)
+{
+ const char *rev_str = NULL;
+
+ switch (rev_id) {
+ case 0x1000:
+ rev_str = "1.0";
+ break;
+ case 0x2000:
+ rev_str = "2.0";
+ break;
+ }
+ return rev_str;
+}
+
static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
{
uint32_t dbgmcu_idcode;
@@ -1116,7 +1113,7 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
break;
case 0x422:
- device_str = "STM32F30x";
+ device_str = "STM32F302xB/C";
switch (rev_id) {
case 0x1000:
@@ -1175,48 +1172,64 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
}
break;
- case 0x444:
- device_str = "STM32F03x";
+ case 0x438:
+ device_str = "STM32F33x";
switch (rev_id) {
case 0x1000:
- rev_str = "1.0";
- break;
-
- case 0x2000:
- rev_str = "2.0";
+ rev_str = "A";
break;
}
break;
- case 0x440:
- device_str = "STM32F05x";
+ case 0x439:
+ device_str = "STM32F302x6/8";
switch (rev_id) {
case 0x1000:
- rev_str = "1.0";
+ rev_str = "A";
break;
- case 0x2000:
- rev_str = "2.0";
+ case 0x1001:
+ rev_str = "Z";
break;
}
break;
- case 0x448:
- device_str = "STM32F07x";
+ case 0x444:
+ device_str = "STM32F03x";
+ rev_str = get_stm32f0_revision(rev_id);
+ break;
+ case 0x440:
+ device_str = "STM32F05x";
+ rev_str = get_stm32f0_revision(rev_id);
+ break;
+
+ case 0x445:
+ device_str = "STM32F04x";
+ rev_str = get_stm32f0_revision(rev_id);
+ break;
+
+ case 0x446:
+ device_str = "STM32F303xD/E";
switch (rev_id) {
case 0x1000:
- rev_str = "1.0";
- break;
-
- case 0x2000:
- rev_str = "2.0";
+ rev_str = "A";
break;
}
break;
+ case 0x448:
+ device_str = "STM32F07x";
+ rev_str = get_stm32f0_revision(rev_id);
+ break;
+
+ case 0x442:
+ device_str = "STM32F09x";
+ rev_str = get_stm32f0_revision(rev_id);
+ break;
+
default:
snprintf(buf, buf_size, "Cannot identify target as a STM32F0/1/3\n");
return ERROR_FAIL;
@@ -1599,4 +1612,5 @@ struct flash_driver stm32f1x_flash = {
.erase_check = default_flash_blank_check,
.protect_check = stm32x_protect_check,
.info = get_stm32x_info,
+ .free_driver_priv = default_flash_free_driver_priv,
};