X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstm32f2x.c;h=36b7a0da53e463c52eee03cfe720074a22335d2c;hp=5e95b9b6b5499e3c374f12007933dfcf5e58a69d;hb=HEAD;hpb=c270e96637e936ac89d8b9c82e4528303b5bbdae

diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c
index 5e95b9b6b5..4e0f731827 100644
--- a/src/flash/nor/stm32f2x.c
+++ b/src/flash/nor/stm32f2x.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
 
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
@@ -230,11 +230,11 @@ static int stm32x_otp_enable(struct flash_bank *bank)
 	struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
 
 	if (!stm32x_info->otp_unlocked) {
-		LOG_INFO("OTP memory bank #%u is is enabled for write commands.",
+		LOG_INFO("OTP memory bank #%u is enabled for write commands.",
 			 bank->bank_number);
 		stm32x_info->otp_unlocked = true;
 	} else {
-		LOG_WARNING("OTP memory bank #%u is is already enabled for write commands.",
+		LOG_WARNING("OTP memory bank #%u is already enabled for write commands.",
 			    bank->bank_number);
 	}
 	return ERROR_OK;
@@ -659,8 +659,10 @@ static int stm32x_protect(struct flash_bank *bank, int set, unsigned int first,
 	}
 
 	if (stm32x_is_otp(bank)) {
-		if (!set)
+		if (!set) {
+			LOG_ERROR("OTP protection can only be enabled");
 			return ERROR_COMMAND_ARGUMENT_INVALID;
+		}
 
 		return stm32x_otp_protect(bank, first, last);
 	}
@@ -959,7 +961,7 @@ static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
 		return retval;
 
 	if ((*device_id & 0xfff) == 0x411
-			&& cortex_m_get_partno_safe(target) == CORTEX_M4_PARTNO) {
+			&& cortex_m_get_impl_part(target) == CORTEX_M4_PARTNO) {
 		*device_id &= ~((0xFFFF << 16) | 0xfff);
 		*device_id |= (0x1000 << 16) | 0x413;
 		LOG_INFO("stm32f4x errata detected - fixing incorrect MCU_IDCODE");
@@ -1125,7 +1127,7 @@ static int stm32x_probe(struct flash_bank *bank)
 		flash_size_in_kb = stm32x_info->user_bank_size / 1024;
 	}
 
-	LOG_INFO("flash size = %" PRIu16 " kbytes", flash_size_in_kb);
+	LOG_INFO("flash size = %" PRIu16 " KiB", flash_size_in_kb);
 
 	/* did we assign flash size? */
 	assert(flash_size_in_kb != 0xffff);
@@ -1538,10 +1540,8 @@ static int stm32x_mass_erase(struct flash_bank *bank)
 
 COMMAND_HANDLER(stm32x_handle_mass_erase_command)
 {
-	if (CMD_ARGC < 1) {
-		command_print(CMD, "stm32x mass_erase <bank>");
+	if (CMD_ARGC != 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
@@ -1564,10 +1564,8 @@ COMMAND_HANDLER(stm32f2x_handle_options_read_command)
 	struct flash_bank *bank;
 	struct stm32x_flash_bank *stm32x_info = NULL;
 
-	if (CMD_ARGC != 1) {
-		command_print(CMD, "stm32f2x options_read <bank>");
+	if (CMD_ARGC != 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 	if (retval != ERROR_OK)
@@ -1610,10 +1608,8 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
 	struct stm32x_flash_bank *stm32x_info = NULL;
 	uint16_t user_options, boot_addr0, boot_addr1, options_mask;
 
-	if (CMD_ARGC < 1) {
-		command_print(CMD, "stm32f2x options_write <bank> ...");
+	if (CMD_ARGC < 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 	if (retval != ERROR_OK)
@@ -1625,19 +1621,14 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
 
 	stm32x_info = bank->driver_priv;
 	if (stm32x_info->has_boot_addr) {
-		if (CMD_ARGC != 4) {
-			command_print(CMD, "stm32f2x options_write <bank> <user_options>"
-				" <boot_addr0> <boot_addr1>");
+		if (CMD_ARGC != 4)
 			return ERROR_COMMAND_SYNTAX_ERROR;
-		}
+
 		COMMAND_PARSE_NUMBER(u16, CMD_ARGV[2], boot_addr0);
 		COMMAND_PARSE_NUMBER(u16, CMD_ARGV[3], boot_addr1);
 		stm32x_info->option_bytes.boot_addr = boot_addr0 | (((uint32_t) boot_addr1) << 16);
-	} else {
-		if (CMD_ARGC != 2) {
-			command_print(CMD, "stm32f2x options_write <bank> <user_options>");
-			return ERROR_COMMAND_SYNTAX_ERROR;
-		}
+	} else if (CMD_ARGC != 2) {
+		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
 	COMMAND_PARSE_NUMBER(u16, CMD_ARGV[1], user_options);
@@ -1672,10 +1663,8 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
 	struct stm32x_flash_bank *stm32x_info = NULL;
 	uint32_t optcr2_pcrop;
 
-	if (CMD_ARGC != 2) {
-		command_print(CMD, "stm32f2x optcr2_write <bank> <optcr2_value>");
+	if (CMD_ARGC != 2)
 		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
 
 	retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 	if (retval != ERROR_OK)
@@ -1709,10 +1698,8 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
 
 COMMAND_HANDLER(stm32x_handle_otp_command)
 {
-	if (CMD_ARGC < 2) {
-		command_print(CMD, "stm32x otp <bank> (enable|disable|show)");
+	if (CMD_ARGC != 2)
 		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
 
 	struct flash_bank *bank;
 	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
@@ -1785,7 +1772,7 @@ static const struct command_registration stm32f2x_exec_command_handlers[] = {
 		.name = "otp",
 		.handler = stm32x_handle_otp_command,
 		.mode = COMMAND_EXEC,
-		.usage = "bank_id",
+		.usage = "bank_id (enable|disable|show)",
 		.help = "OTP (One Time Programmable) memory write enable/disable.",
 	},
 	COMMAND_REGISTRATION_DONE