X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstm32f2x.c;h=5f5bfb853aa5f01d6a1a8908fb2fe861ca20b661;hp=0e8cec306fbb56eb6154d51705ddf33b8d001c54;hb=055abd0b9cb3427fb9b52263d2be49620e8e4c97;hpb=2475e7b14c03b54ce641dce9b859be57b26df522;ds=sidebyside diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c index 0e8cec306f..5f5bfb853a 100644 --- a/src/flash/nor/stm32f2x.c +++ b/src/flash/nor/stm32f2x.c @@ -23,6 +23,7 @@ * Free Software Foundation, Inc., * * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * ***************************************************************************/ + #ifdef HAVE_CONFIG_H #include "config.h" #endif @@ -70,7 +71,8 @@ * http://www.st.com/internet/mcu/product/250192.jsp * * PM0059 - * www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/PROGRAMMING_MANUAL/CD00233952.pdf + * www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/ + * PROGRAMMING_MANUAL/CD00233952.pdf * * STM32F1x series - notice that this code was copy, pasted and knocked * into a stm32f2x driver, so in case something has been converted or @@ -85,11 +87,10 @@ * */ - // Erase time can be as high as 1000ms, 10x this and it's toast... +/* Erase time can be as high as 1000ms, 10x this and it's toast... */ #define FLASH_ERASE_TIMEOUT 10000 #define FLASH_WRITE_TIMEOUT 5 - #define STM32_FLASH_BASE 0x40023c00 #define STM32_FLASH_ACR 0x40023c00 #define STM32_FLASH_KEYR 0x40023c04 @@ -99,8 +100,6 @@ #define STM32_FLASH_OPTCR 0x40023c14 #define STM32_FLASH_OBR 0x40023c1C - - /* option byte location */ #define STM32_OB_RDP 0x1FFFF800 @@ -122,19 +121,19 @@ #define FLASH_PSIZE_16 (1 << 8) #define FLASH_PSIZE_32 (2 << 8) #define FLASH_PSIZE_64 (3 << 8) -#define FLASH_SNB(a) ((a) << 3) +#define FLASH_SNB(a) ((a) << 3) #define FLASH_LOCK (1 << 31) /* FLASH_SR register bits */ #define FLASH_BSY (1 << 16) -#define FLASH_PGSERR (1 << 7) // Programming sequence error -#define FLASH_PGPERR (1 << 6) // Programming parallelism error -#define FLASH_PGAERR (1 << 5) // Programming alignment error -#define FLASH_WRPERR (1 << 4) // Write protection error -#define FLASH_OPERR (1 << 1) // Operation error +#define FLASH_PGSERR (1 << 7) /* Programming sequence error */ +#define FLASH_PGPERR (1 << 6) /* Programming parallelism error */ +#define FLASH_PGAERR (1 << 5) /* Programming alignment error */ +#define FLASH_WRPERR (1 << 4) /* Write protection error */ +#define FLASH_OPERR (1 << 1) /* Operation error */ -#define FLASH_ERROR (FLASH_PGSERR | FLASH_PGPERR | FLASH_PGAERR| FLASH_WRPERR| FLASH_OPERR) +#define FLASH_ERROR (FLASH_PGSERR | FLASH_PGPERR | FLASH_PGAERR | FLASH_WRPERR | FLASH_OPERR) /* STM32_FLASH_OBR bit definitions (reading) */ @@ -150,8 +149,7 @@ #define KEY1 0x45670123 #define KEY2 0xCDEF89AB -struct stm32x_flash_bank -{ +struct stm32x_flash_bank { struct working_area *write_algorithm; int probed; }; @@ -164,10 +162,7 @@ FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command) struct stm32x_flash_bank *stm32x_info; if (CMD_ARGC < 6) - { - LOG_WARNING("incomplete flash_bank stm32x configuration"); - return ERROR_FLASH_BANK_INVALID; - } + return ERROR_COMMAND_SYNTAX_ERROR; stm32x_info = malloc(sizeof(struct stm32x_flash_bank)); bank->driver_priv = stm32x_info; @@ -196,16 +191,14 @@ static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout) int retval = ERROR_OK; /* wait for busy to clear */ - for (;;) - { + for (;;) { retval = stm32x_get_flash_status(bank, &status); if (retval != ERROR_OK) return retval; LOG_DEBUG("status: 0x%" PRIx32 "", status); if ((status & FLASH_BSY) == 0) break; - if (timeout-- <= 0) - { + if (timeout-- <= 0) { LOG_ERROR("timed out waiting for flash"); return ERROR_FAIL; } @@ -213,15 +206,13 @@ static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout) } - if (status & FLASH_WRPERR) - { + if (status & FLASH_WRPERR) { LOG_ERROR("stm32x device protected"); retval = ERROR_FAIL; } /* Clear but report errors */ - if (status & FLASH_ERROR) - { + if (status & FLASH_ERROR) { /* If this operation fails, we ignore it and report the original * retval */ @@ -233,14 +224,36 @@ static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout) static int stm32x_unlock_reg(struct target *target) { + uint32_t ctrl; + + /* first check if not already unlocked + * otherwise writing on STM32_FLASH_KEYR will fail + */ + int retval = target_read_u32(target, STM32_FLASH_CR, &ctrl); + if (retval != ERROR_OK) + return retval; + + if ((ctrl & FLASH_LOCK) == 0) + return ERROR_OK; + /* unlock flash registers */ - int retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1); + retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1); if (retval != ERROR_OK) return retval; retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2); if (retval != ERROR_OK) return retval; + + retval = target_read_u32(target, STM32_FLASH_CR, &ctrl); + if (retval != ERROR_OK) + return retval; + + if (ctrl & FLASH_LOCK) { + LOG_ERROR("flash not unlocked STM32_FLASH_CR: %x", ctrl); + return ERROR_TARGET_FAILURE; + } + return ERROR_OK; } @@ -254,8 +267,7 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last) struct target *target = bank->target; int i; - if (bank->target->state != TARGET_HALTED) - { + if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -276,8 +288,7 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last) 4. Wait for the BSY bit to be cleared */ - for (i = first; i <= last; i++) - { + for (i = first; i <= last; i++) { retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_SER | FLASH_SNB(i) | FLASH_STRT); if (retval != ERROR_OK) @@ -316,55 +327,60 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, /* see contrib/loaders/flash/stm32f2x.S for src */ - static const uint16_t stm32x_flash_write_code_16[] = { -// 00000000 : - 0x4b07, // ldr r3, [pc, #28] (20 ) - 0x6123, // str r3, [r4, #16] - 0xf830, 0x3b02, //ldrh.w r3, [r0], #2 - 0xf821, 0x3b02, //strh.w r3, [r1], #2 - - //0000000c : - 0x68e3, //ldr r3, [r4, #12] -0xf413, 0x3f80, // tst.w r3, #65536 ; 0x10000 -0xd0fb, //beq.n c -0xf013, 0x0ff0, //tst.w r3, #240 ; 0xf0 -0xd101, //bne.n 1e -0x3a01, //subs r2, #1 -0xd1f0, //bne.n 0 - //0000001e : - 0xbe00, // bkpt 0x0000 - - //00000020 : - 0x0101, 0x0000, // .word 0x00000101 - + static const uint8_t stm32x_flash_write_code[] = { + /* wait_fifo: */ + 0xD0, 0xF8, 0x00, 0x80, /* ldr r8, [r0, #0] */ + 0xB8, 0xF1, 0x00, 0x0F, /* cmp r8, #0 */ + 0x1A, 0xD0, /* beq exit */ + 0x47, 0x68, /* ldr r7, [r0, #4] */ + 0x47, 0x45, /* cmp r7, r8 */ + 0xF7, 0xD0, /* beq wait_fifo */ + + 0xDF, 0xF8, 0x30, 0x60, /* ldr r6, STM32_PROG16 */ + 0x26, 0x61, /* str r6, [r4, #STM32_FLASH_CR_OFFSET] */ + 0x37, 0xF8, 0x02, 0x6B, /* ldrh r6, [r7], #0x02 */ + 0x22, 0xF8, 0x02, 0x6B, /* strh r6, [r2], #0x02 */ + /* busy: */ + 0xE6, 0x68, /* ldr r6, [r4, #STM32_FLASH_SR_OFFSET] */ + 0x16, 0xF4, 0x80, 0x3F, /* tst r6, #0x10000 */ + 0xFB, 0xD1, /* bne busy */ + 0x16, 0xF0, 0xF0, 0x0F, /* tst r6, #0xf0 */ + 0x07, 0xD1, /* bne error */ + + 0x8F, 0x42, /* cmp r7, r1 */ + 0x28, 0xBF, /* it cs */ + 0x00, 0xF1, 0x08, 0x07, /* addcs r7, r0, #8 */ + 0x47, 0x60, /* str r7, [r0, #4] */ + 0x01, 0x3B, /* subs r3, r3, #1 */ + 0x13, 0xB1, /* cbz r3, exit */ + 0xE1, 0xE7, /* b wait_fifo */ + /* error: */ + 0x00, 0x21, /* movs r1, #0 */ + 0x41, 0x60, /* str r1, [r0, #4] */ + /* exit: */ + 0x30, 0x46, /* mov r0, r6 */ + 0x00, 0xBE, /* bkpt #0x00 */ + + /* : */ + 0x01, 0x01, 0x00, 0x00, /* .word 0x00000101 */ }; - // Flip endian - uint8_t stm32x_flash_write_code[sizeof(stm32x_flash_write_code_16)*2]; - for (unsigned i = 0; i < sizeof(stm32x_flash_write_code_16) / 2; i++) - { - stm32x_flash_write_code[i*2 + 0] = stm32x_flash_write_code_16[i] & 0xff; - stm32x_flash_write_code[i*2 + 1] = (stm32x_flash_write_code_16[i] >> 8) & 0xff; - } - if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), - &stm32x_info->write_algorithm) != ERROR_OK) - { + &stm32x_info->write_algorithm) != ERROR_OK) { LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; - if ((retval = target_write_buffer(target, stm32x_info->write_algorithm->address, + retval = target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), - (uint8_t*)stm32x_flash_write_code)) != ERROR_OK) + (uint8_t *)stm32x_flash_write_code); + if (retval != ERROR_OK) return retval; /* memory buffer */ - while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) - { + while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { buffer_size /= 2; - if (buffer_size <= 256) - { + if (buffer_size <= 256) { /* if we already allocated the writing code, but failed to get a * buffer, free the algorithm */ if (stm32x_info->write_algorithm) @@ -378,57 +394,39 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; armv7m_info.core_mode = ARMV7M_MODE_ANY; - init_reg_param(®_params[0], "r0", 32, PARAM_OUT); - init_reg_param(®_params[1], "r1", 32, PARAM_OUT); - init_reg_param(®_params[2], "r2", 32, PARAM_OUT); - init_reg_param(®_params[3], "r3", 32, PARAM_IN_OUT); - init_reg_param(®_params[4], "r4", 32, PARAM_OUT); + init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */ + init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer end */ + init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* target address */ + init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* count (halfword-16bit) */ + init_reg_param(®_params[4], "r4", 32, PARAM_OUT); /* flash base */ - while (count > 0) - { - uint32_t thisrun_count = (count > (buffer_size / 2)) ? - (buffer_size / 2) : count; + buf_set_u32(reg_params[0].value, 0, 32, source->address); + buf_set_u32(reg_params[1].value, 0, 32, source->address + source->size); + buf_set_u32(reg_params[2].value, 0, 32, address); + buf_set_u32(reg_params[3].value, 0, 32, count); + buf_set_u32(reg_params[4].value, 0, 32, STM32_FLASH_BASE); - if ((retval = target_write_buffer(target, source->address, - thisrun_count * 2, buffer)) != ERROR_OK) - break; + retval = target_run_flash_async_algorithm(target, buffer, count, 2, + 0, NULL, + 5, reg_params, + source->address, source->size, + stm32x_info->write_algorithm->address, 0, + &armv7m_info); - buf_set_u32(reg_params[0].value, 0, 32, source->address); - buf_set_u32(reg_params[1].value, 0, 32, address); - buf_set_u32(reg_params[2].value, 0, 32, thisrun_count); - // R3 is a return value only - buf_set_u32(reg_params[4].value, 0, 32, STM32_FLASH_BASE); - - if ((retval = target_run_algorithm(target, 0, NULL, - sizeof(reg_params) / sizeof(*reg_params), - reg_params, - stm32x_info->write_algorithm->address, - 0, - 10000, &armv7m_info)) != ERROR_OK) - { - LOG_ERROR("error executing stm32x flash write algorithm"); - break; - } + if (retval == ERROR_FLASH_OPERATION_FAILED) { + LOG_ERROR("error executing stm32x flash write algorithm"); - uint32_t error = buf_get_u32(reg_params[3].value, 0, 32) & FLASH_ERROR; + uint32_t error = buf_get_u32(reg_params[0].value, 0, 32) & FLASH_ERROR; if (error & FLASH_WRPERR) - { LOG_ERROR("flash memory write protected"); - } - if (error != 0) - { + if (error != 0) { LOG_ERROR("flash write failed = %08x", error); /* Clear but report errors */ target_write_u32(target, STM32_FLASH_SR, error); retval = ERROR_FAIL; - break; } - - buffer += thisrun_count * 2; - address += thisrun_count * 2; - count -= thisrun_count; } target_free_working_area(target, source); @@ -453,14 +451,12 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t bytes_written = 0; int retval; - if (bank->target->state != TARGET_HALTED) - { + if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - if (offset & 0x1) - { + if (offset & 0x1) { LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -470,20 +466,16 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer, return retval; /* multiple half words (2-byte) to be programmed? */ - if (words_remaining > 0) - { + if (words_remaining > 0) { /* try using a block write */ - if ((retval = stm32x_write_block(bank, buffer, offset, words_remaining)) != ERROR_OK) - { - if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) - { + retval = stm32x_write_block(bank, buffer, offset, words_remaining); + if (retval != ERROR_OK) { + if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { /* if block write failed (no sufficient working area), * we use normal (slow) single dword accesses */ LOG_WARNING("couldn't use block writes, falling back to single memory accesses"); } - } - else - { + } else { buffer += words_remaining * 2; address += words_remaining * 2; words_remaining = 0; @@ -509,8 +501,7 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer, Double word access in case of x64 parallelism Wait for the BSY bit to be cleared */ - while (words_remaining > 0) - { + while (words_remaining > 0) { uint16_t value; memcpy(&value, buffer + bytes_written, sizeof(uint16_t)); @@ -532,8 +523,7 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer, address += 2; } - if (bytes_remaining) - { + if (bytes_remaining) { retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG | FLASH_PSIZE_8); if (retval != ERROR_OK) @@ -552,47 +542,105 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer, static void setup_sector(struct flash_bank *bank, int start, int num, int size) { - for (int i = start; i < (start + num) ; i++) - { + for (int i = start; i < (start + num) ; i++) { bank->sectors[i].offset = bank->size; bank->sectors[i].size = size; bank->size += bank->sectors[i].size; } } +static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id) +{ + /* this checks for a stm32f4x errata issue where a + * stm32f2x DBGMCU_IDCODE is incorrectly returned. + * If the issue is detected target is forced to stm32f4x Rev A. + * Only effects Rev A silicon */ + + struct target *target = bank->target; + uint32_t cpuid; + + /* read stm32 device id register */ + int retval = target_read_u32(target, 0xE0042000, device_id); + if (retval != ERROR_OK) + return retval; + + if ((*device_id & 0xfff) == 0x411) { + /* read CPUID reg to check core type */ + retval = target_read_u32(target, 0xE000ED00, &cpuid); + if (retval != ERROR_OK) + return retval; + + /* check for cortex_m4 */ + if (((cpuid >> 4) & 0xFFF) == 0xC24) { + *device_id &= ~((0xFFFF << 16) | 0xfff); + *device_id |= (0x1000 << 16) | 0x413; + LOG_INFO("stm32f4x errata detected - fixing incorrect MCU_IDCODE"); + } + } + return retval; +} + static int stm32x_probe(struct flash_bank *bank) { struct target *target = bank->target; struct stm32x_flash_bank *stm32x_info = bank->driver_priv; int i; - uint16_t num_pages; + uint16_t flash_size_in_kb; uint32_t device_id; uint32_t base_address = 0x08000000; stm32x_info->probed = 0; /* read stm32 device id register */ - int retval = target_read_u32(target, 0xE0042000, &device_id); + int retval = stm32x_get_device_id(bank, &device_id); if (retval != ERROR_OK) return retval; LOG_INFO("device id = 0x%08" PRIx32 "", device_id); - if ((device_id & 0x7ff) != 0x411) - { - LOG_WARNING("Cannot identify target as a STM32 family, try the other STM32 drivers."); + /* get flash size from target. */ + retval = target_read_u16(target, 0x1FFF7A22, &flash_size_in_kb); + if (retval != ERROR_OK) { + LOG_WARNING("failed reading flash size, default to max target family"); + /* failed reading flash size, default to max target family */ + flash_size_in_kb = 0xffff; + } + + /* some variants read 0 for flash size register + * use a max flash size as a default */ + if (flash_size_in_kb == 0) + flash_size_in_kb = 0xffff; + + if ((device_id & 0xfff) == 0x411) { + /* check for early silicon */ + if (flash_size_in_kb == 0xffff) { + /* number of sectors may be incorrrect on early silicon */ + LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 1024k flash"); + flash_size_in_kb = 1024; + } + } else if ((device_id & 0xfff) == 0x413) { + /* check for early silicon */ + if (flash_size_in_kb == 0xffff) { + /* number of sectors may be incorrrect on early silicon */ + LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 1024k flash"); + flash_size_in_kb = 1024; + } + } else { + LOG_WARNING("Cannot identify target as a STM32 family."); return ERROR_FAIL; } - /* sectors sizes vary, handle this in a different code path - * than the rest. - */ - // Uhhh.... what to use here? + LOG_INFO("flash size = %dkbytes", flash_size_in_kb); - /* calculate numbers of pages*/ - num_pages = 4 + 1 + 7; + /* did we assign flash size? */ + assert(flash_size_in_kb != 0xffff); - if (bank->sectors) - { + /* calculate numbers of pages */ + int num_pages = (flash_size_in_kb / 128) + 4; + + /* check that calculation result makes sense */ + assert(num_pages > 0); + + if (bank->sectors) { free(bank->sectors); bank->sectors = NULL; } @@ -600,20 +648,20 @@ static int stm32x_probe(struct flash_bank *bank) bank->base = base_address; bank->num_sectors = num_pages; bank->sectors = malloc(sizeof(struct flash_sector) * num_pages); - bank->size = 0; + + /* fixed memory */ setup_sector(bank, 0, 4, 16 * 1024); setup_sector(bank, 4, 1, 64 * 1024); - setup_sector(bank, 4+1, 7, 128 * 1024); - for (i = 0; i < num_pages; i++) - { + /* dynamic memory */ + setup_sector(bank, 4 + 1, num_pages - 5, 128 * 1024); + + for (i = 0; i < num_pages; i++) { bank->sectors[i].is_erased = -1; bank->sectors[i].is_protected = 0; } - LOG_INFO("flash size = %dkBytes", bank->size / 1024); - stm32x_info->probed = 1; return ERROR_OK; @@ -629,23 +677,20 @@ static int stm32x_auto_probe(struct flash_bank *bank) static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size) { - struct target *target = bank->target; uint32_t device_id; int printed; /* read stm32 device id register */ - int retval = target_read_u32(target, 0xE0042000, &device_id); + int retval = stm32x_get_device_id(bank, &device_id); if (retval != ERROR_OK) return retval; - if ((device_id & 0x7ff) == 0x411) - { - printed = snprintf(buf, buf_size, "stm32x (1mByte part) - Rev: "); + if ((device_id & 0xfff) == 0x411) { + printed = snprintf(buf, buf_size, "stm32f2x - Rev: "); buf += printed; buf_size -= printed; - switch (device_id >> 16) - { + switch (device_id >> 16) { case 0x1000: snprintf(buf, buf_size, "A"); break; @@ -666,9 +711,25 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size) snprintf(buf, buf_size, "unknown"); break; } - } - else - { + } else if ((device_id & 0xfff) == 0x413) { + printed = snprintf(buf, buf_size, "stm32f4x - Rev: "); + buf += printed; + buf_size -= printed; + + switch (device_id >> 16) { + case 0x1000: + snprintf(buf, buf_size, "A"); + break; + + case 0x1001: + snprintf(buf, buf_size, "Z"); + break; + + default: + snprintf(buf, buf_size, "unknown"); + break; + } + } else { snprintf(buf, buf_size, "Cannot identify target as a stm32x\n"); return ERROR_FAIL; } @@ -676,7 +737,76 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size) return ERROR_OK; } +static int stm32x_mass_erase(struct flash_bank *bank) +{ + int retval; + struct target *target = bank->target; + + if (target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); + return ERROR_TARGET_NOT_HALTED; + } + + retval = stm32x_unlock_reg(target); + if (retval != ERROR_OK) + return retval; + + /* mass erase flash memory */ + retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_MER); + if (retval != ERROR_OK) + return retval; + retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), + FLASH_MER | FLASH_STRT); + if (retval != ERROR_OK) + return retval; + + retval = stm32x_wait_status_busy(bank, 30000); + if (retval != ERROR_OK) + return retval; + + retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK); + if (retval != ERROR_OK) + return retval; + + return ERROR_OK; +} + +COMMAND_HANDLER(stm32x_handle_mass_erase_command) +{ + int i; + + if (CMD_ARGC < 1) { + command_print(CMD_CTX, "stm32x mass_erase "); + return ERROR_COMMAND_SYNTAX_ERROR; + } + + struct flash_bank *bank; + int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank); + if (ERROR_OK != retval) + return retval; + + retval = stm32x_mass_erase(bank); + if (retval == ERROR_OK) { + /* set all sectors as erased */ + for (i = 0; i < bank->num_sectors; i++) + bank->sectors[i].is_erased = 1; + + command_print(CMD_CTX, "stm32x mass erase complete"); + } else { + command_print(CMD_CTX, "stm32x mass erase failed"); + } + + return retval; +} + static const struct command_registration stm32x_exec_command_handlers[] = { + { + .name = "mass_erase", + .handler = stm32x_handle_mass_erase_command, + .mode = COMMAND_EXEC, + .usage = "bank_id", + .help = "Erase entire flash device.", + }, COMMAND_REGISTRATION_DONE }; @@ -685,6 +815,7 @@ static const struct command_registration stm32x_command_handlers[] = { .name = "stm32f2x", .mode = COMMAND_ANY, .help = "stm32f2x flash command group", + .usage = "", .chain = stm32x_exec_command_handlers, }, COMMAND_REGISTRATION_DONE @@ -700,7 +831,7 @@ struct flash_driver stm32f2x_flash = { .read = default_flash_read, .probe = stm32x_probe, .auto_probe = stm32x_auto_probe, - .erase_check = default_flash_mem_blank_check, + .erase_check = default_flash_blank_check, .protect_check = stm32x_protect_check, .info = get_stm32x_info, };