X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstm32x.c;h=d11a8edc640b56c77b21965d92a7d70258029b30;hp=53fc4ea23a56ffcd9ebd81a2013d10fb5d5f53e8;hb=bc8be110ff314cab0e09792a05b6871672c18302;hpb=a851ce0d6f2b961f94e09746304e0fb0dad6a15f diff --git a/src/flash/nor/stm32x.c b/src/flash/nor/stm32x.c index 53fc4ea23a..d11a8edc64 100644 --- a/src/flash/nor/stm32x.c +++ b/src/flash/nor/stm32x.c @@ -331,7 +331,7 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last) target_write_u32(target, STM32_FLASH_AR, bank->base + bank->sectors[i].offset); target_write_u32(target, STM32_FLASH_CR, FLASH_PER | FLASH_STRT); - status = stm32x_wait_status_busy(bank, 10); + status = stm32x_wait_status_busy(bank, 100); if (status & FLASH_WRPRTERR) return ERROR_FLASH_OPERATION_FAILED; @@ -362,9 +362,11 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last) return ERROR_TARGET_NOT_HALTED; } - if ((first && (first % stm32x_info->ppage_size)) || ((last + 1) && (last + 1) % stm32x_info->ppage_size)) + if ((first && (first % stm32x_info->ppage_size)) || ((last + 1) && + (last + 1) % stm32x_info->ppage_size)) { - LOG_WARNING("Error: start and end sectors must be on a %d sector boundary", stm32x_info->ppage_size); + LOG_WARNING("Error: start and end sectors must be on a %d sector boundary", + stm32x_info->ppage_size); return ERROR_FLASH_SECTOR_INVALID; } @@ -432,7 +434,8 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last) return stm32x_write_options(bank); } -static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, + uint32_t offset, uint32_t count) { struct stm32x_flash_bank *stm32x_info = bank->driver_priv; struct target *target = bank->target; @@ -443,7 +446,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t struct armv7m_algorithm armv7m_info; int retval = ERROR_OK; - uint8_t stm32x_flash_write_code[] = { + static const uint8_t stm32x_flash_write_code[] = { /* write: */ 0xDF, 0xF8, 0x24, 0x40, /* ldr r4, STM32_FLASH_CR */ 0x09, 0x4D, /* ldr r5, STM32_FLASH_SR */ @@ -465,22 +468,26 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t }; /* flash write code */ - if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), &stm32x_info->write_algorithm) != ERROR_OK) + if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), + &stm32x_info->write_algorithm) != ERROR_OK) { LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; - if ((retval = target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code)) != ERROR_OK) + if ((retval = target_write_buffer(target, stm32x_info->write_algorithm->address, + sizeof(stm32x_flash_write_code), + (uint8_t*)stm32x_flash_write_code)) != ERROR_OK) return retval; /* memory buffer */ - while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) + while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { buffer_size /= 2; if (buffer_size <= 256) { - /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */ + /* if we already allocated the writing code, but failed to get a + * buffer, free the algorithm */ if (stm32x_info->write_algorithm) target_free_working_area(target, stm32x_info->write_algorithm); @@ -499,17 +506,21 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t while (count > 0) { - uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count; + uint32_t thisrun_count = (count > (buffer_size / 2)) ? + (buffer_size / 2) : count; - if ((retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer)) != ERROR_OK) + if ((retval = target_write_buffer(target, source->address, + thisrun_count * 2, buffer)) != ERROR_OK) break; buf_set_u32(reg_params[0].value, 0, 32, source->address); buf_set_u32(reg_params[1].value, 0, 32, address); buf_set_u32(reg_params[2].value, 0, 32, thisrun_count); - if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params, stm32x_info->write_algorithm->address, \ - stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10), 10000, &armv7m_info)) != ERROR_OK) + if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params, + stm32x_info->write_algorithm->address, + stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10), + 10000, &armv7m_info)) != ERROR_OK) { LOG_ERROR("error executing stm32x flash write algorithm"); retval = ERROR_FLASH_OPERATION_FAILED; @@ -550,7 +561,8 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t return retval; } -static int stm32x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +static int stm32x_write(struct flash_bank *bank, uint8_t *buffer, + uint32_t offset, uint32_t count) { struct target *target = bank->target; uint32_t words_remaining = (count / 2); @@ -664,12 +676,6 @@ static int stm32x_probe(struct flash_bank *bank) uint32_t device_id; int page_size; - if (bank->target->state != TARGET_HALTED) - { - LOG_ERROR("Target not halted"); - return ERROR_TARGET_NOT_HALTED; - } - stm32x_info->probed = 0; /* read stm32 device id register */ @@ -743,6 +749,21 @@ static int stm32x_probe(struct flash_bank *bank) num_pages = 256; } } + else if ((device_id & 0x7ff) == 0x420) + { + /* value line density - we have 1k pages + * 4 pages for a protection area */ + page_size = 1024; + stm32x_info->ppage_size = 4; + + /* check for early silicon */ + if (num_pages == 0xffff) + { + /* number of sectors may be incorrrect on early silicon */ + LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash"); + num_pages = 128; + } + } else { LOG_WARNING("Cannot identify target as a STM32 family."); @@ -884,6 +905,27 @@ static int stm32x_info(struct flash_bank *bank, char *buf, int buf_size) break; } } + else if ((device_id & 0x7ff) == 0x420) + { + printed = snprintf(buf, buf_size, "stm32x (Value) - Rev: "); + buf += printed; + buf_size -= printed; + + switch (device_id >> 16) + { + case 0x1000: + snprintf(buf, buf_size, "A"); + break; + + case 0x1001: + snprintf(buf, buf_size, "Z"); + break; + + default: + snprintf(buf, buf_size, "unknown"); + break; + } + } else { snprintf(buf, buf_size, "Cannot identify target as a stm32x\n"); @@ -1141,7 +1183,7 @@ static int stm32x_mass_erase(struct flash_bank *bank) target_write_u32(target, STM32_FLASH_CR, FLASH_MER); target_write_u32(target, STM32_FLASH_CR, FLASH_MER | FLASH_STRT); - status = stm32x_wait_status_busy(bank, 10); + status = stm32x_wait_status_busy(bank, 100); target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK); @@ -1233,6 +1275,7 @@ static const struct command_registration stm32x_exec_command_handlers[] = { }, COMMAND_REGISTRATION_DONE }; + static const struct command_registration stm32x_command_handlers[] = { { .name = "stm32x", @@ -1250,6 +1293,7 @@ struct flash_driver stm32x_flash = { .erase = stm32x_erase, .protect = stm32x_protect, .write = stm32x_write, + .read = default_flash_read, .probe = stm32x_probe, .auto_probe = stm32x_auto_probe, .erase_check = default_flash_mem_blank_check,