X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstr7x.c;h=3a74d3538b7c422d56aa5ec386abe606c6e86d0b;hp=3bf07c95d821c6907eadfcac6f02935beb477efc;hb=f5ae179519d578169b4123af89eebf667efa1e2c;hpb=503f6139c7ed05339daea8c4984d32840d795222 diff --git a/src/flash/nor/str7x.c b/src/flash/nor/str7x.c index 3bf07c95d8..3a74d3538b 100644 --- a/src/flash/nor/str7x.c +++ b/src/flash/nor/str7x.c @@ -5,6 +5,9 @@ * Copyright (C) 2008 by Spencer Oliver * * spen@spen-soft.co.uk * * * + * Copyright (C) 2010 Øyvind Harboe * + * oyvind.harboe@zylin.com * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -31,7 +34,7 @@ #include -struct str7x_mem_layout mem_layout_str7bank0[] = { +static struct str7x_mem_layout mem_layout_str7bank0[] = { {0x00000000, 0x02000, 0x01}, {0x00002000, 0x02000, 0x02}, {0x00004000, 0x02000, 0x04}, @@ -42,7 +45,7 @@ struct str7x_mem_layout mem_layout_str7bank0[] = { {0x00030000, 0x10000, 0x80} }; -struct str7x_mem_layout mem_layout_str7bank1[] = { +static struct str7x_mem_layout mem_layout_str7bank1[] = { {0x00000000, 0x02000, 0x10000}, {0x00002000, 0x02000, 0x20000} }; @@ -162,22 +165,88 @@ FLASH_BANK_COMMAND_HANDLER(str7x_flash_bank_command) return ERROR_OK; } -static uint32_t str7x_status(struct flash_bank *bank) +/* wait for flash to become idle or report errors. + + FIX!!! what's the maximum timeout??? The documentation doesn't + state any maximum time.... by inspection it seems > 1000ms is to be + expected. + + 10000ms is long enough that it should cover anything, yet not + quite be equivalent to an infinite loop. + + */ +static int str7x_waitbusy(struct flash_bank *bank) { + int err; + int i; struct target *target = bank->target; - uint32_t retval; + struct str7x_flash_bank *str7x_info = bank->driver_priv; - target_read_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), &retval); + for (i = 0 ; i < 10000; i++) + { + uint32_t retval; + err = target_read_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), &retval); + if (err != ERROR_OK) + return err; - return retval; + if ((retval & str7x_info->busy_bits) == 0) + return ERROR_OK; + + alive_sleep(1); + } + LOG_ERROR("Timed out waiting for str7x flash"); + return ERROR_FAIL; } -static uint32_t str7x_result(struct flash_bank *bank) + +static int str7x_result(struct flash_bank *bank) { struct target *target = bank->target; uint32_t retval; - target_read_u32(target, str7x_get_flash_adr(bank, FLASH_ER), &retval); + int err; + err = target_read_u32(target, str7x_get_flash_adr(bank, FLASH_ER), &retval); + if (err != ERROR_OK) + return err; + + if (retval & FLASH_WPF) + { + LOG_ERROR("str7x hw write protection set"); + err = ERROR_FAIL; + } + if (retval & FLASH_RESER) + { + LOG_ERROR("str7x suspended program erase not resumed"); + err = ERROR_FAIL; + } + if (retval & FLASH_10ER) + { + LOG_ERROR("str7x trying to set bit to 1 when it is already 0"); + err = ERROR_FAIL; + } + if (retval & FLASH_PGER) + { + LOG_ERROR("str7x program error"); + err = ERROR_FAIL; + } + if (retval & FLASH_ERER) + { + LOG_ERROR("str7x erase error"); + err = ERROR_FAIL; + } + if (err == ERROR_OK) + { + if (retval & FLASH_ERR) + { + /* this should always be set if one of the others are set... */ + LOG_ERROR("str7x write operation failed / bad setup"); + err = ERROR_FAIL; + } + } + if (err != ERROR_OK) + { + LOG_ERROR("FLASH_ER register contents: 0x%" PRIx32, retval); + } return retval; } @@ -216,8 +285,8 @@ static int str7x_erase(struct flash_bank *bank, int first, int last) int i; uint32_t cmd; - uint32_t retval; uint32_t sectors = 0; + int err; if (bank->target->state != TARGET_HALTED) { @@ -233,28 +302,32 @@ static int str7x_erase(struct flash_bank *bank, int first, int last) LOG_DEBUG("sectors: 0x%" PRIx32 "", sectors); /* clear FLASH_ER register */ - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); + if (err != ERROR_OK) + return err; cmd = FLASH_SER; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + if (err != ERROR_OK) + return err; cmd = sectors; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd); + if (err != ERROR_OK) + return err; cmd = FLASH_SER | FLASH_WMS; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - - while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) { - alive_sleep(1); - } + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + if (err != ERROR_OK) + return err; - retval = str7x_result(bank); + err = str7x_waitbusy(bank); + if (err != ERROR_OK) + return err; - if (retval) - { - LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%" PRIx32 "", retval); - return ERROR_FLASH_OPERATION_FAILED; - } + err = str7x_result(bank); + if (err != ERROR_OK) + return err; for (i = first; i <= last; i++) bank->sectors[i].is_erased = 1; @@ -268,7 +341,6 @@ static int str7x_protect(struct flash_bank *bank, int set, int first, int last) struct target *target = bank->target; int i; uint32_t cmd; - uint32_t retval; uint32_t protect_blocks; if (bank->target->state != TARGET_HALTED) @@ -286,48 +358,57 @@ static int str7x_protect(struct flash_bank *bank, int set, int first, int last) } /* clear FLASH_ER register */ - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); + int err; + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); + if (err != ERROR_OK) + return err; cmd = FLASH_SPR; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + if (err != ERROR_OK) + return err; cmd = str7x_get_flash_adr(bank, FLASH_NVWPAR); - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), cmd); + if (err != ERROR_OK) + return err; cmd = protect_blocks; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), cmd); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), cmd); + if (err != ERROR_OK) + return err; cmd = FLASH_SPR | FLASH_WMS; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - - while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) { - alive_sleep(1); - } - - retval = str7x_result(bank); + err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + if (err != ERROR_OK) + return err; - LOG_DEBUG("retval: 0x%8.8" PRIx32 "", retval); + err = str7x_waitbusy(bank); + if (err != ERROR_OK) + return err; - if (retval & FLASH_ERER) - return ERROR_FLASH_SECTOR_NOT_ERASED; - else if (retval & FLASH_WPF) - return ERROR_FLASH_OPERATION_FAILED; + err = str7x_result(bank); + if (err != ERROR_OK) + return err; return ERROR_OK; } -static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, + uint32_t offset, uint32_t count) { struct str7x_flash_bank *str7x_info = bank->driver_priv; struct target *target = bank->target; - uint32_t buffer_size = 8192; + uint32_t buffer_size = 32768; struct working_area *source; uint32_t address = bank->base + offset; struct reg_param reg_params[6]; struct arm_algorithm armv4_5_info; int retval = ERROR_OK; - uint32_t str7x_flash_write_code[] = { + /* see contib/loaders/flash/str7x.s for src */ + + static const uint32_t str7x_flash_write_code[] = { /* write: */ 0xe3a04201, /* mov r4, #0x10000000 */ 0xe5824000, /* str r4, [r2, #0x0] */ @@ -354,21 +435,24 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t }; /* flash write code */ - if (target_alloc_working_area(target, 4 * 20, &str7x_info->write_algorithm) != ERROR_OK) + if (target_alloc_working_area_try(target, sizeof(str7x_flash_write_code), + &str7x_info->write_algorithm) != ERROR_OK) { - LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; - target_write_buffer(target, str7x_info->write_algorithm->address, 20 * 4, (uint8_t*)str7x_flash_write_code); + target_write_buffer(target, str7x_info->write_algorithm->address, + sizeof(str7x_flash_write_code), + (uint8_t*)str7x_flash_write_code); /* memory buffer */ - while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) + while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { buffer_size /= 2; if (buffer_size <= 256) { - /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */ + /* if we already allocated the writing code, but failed to get a + * buffer, free the algorithm */ if (str7x_info->write_algorithm) target_free_working_area(target, str7x_info->write_algorithm); @@ -400,16 +484,17 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t buf_set_u32(reg_params[3].value, 0, 32, thisrun_count); buf_set_u32(reg_params[5].value, 0, 32, str7x_info->busy_bits); - if ((retval = target_run_algorithm(target, 0, NULL, 6, reg_params, str7x_info->write_algorithm->address, str7x_info->write_algorithm->address + (19 * 4), 10000, &armv4_5_info)) != ERROR_OK) + if ((retval = target_run_algorithm(target, 0, NULL, 6, reg_params, + str7x_info->write_algorithm->address, + str7x_info->write_algorithm->address + (sizeof(str7x_flash_write_code) - 4), + 10000, &armv4_5_info)) != ERROR_OK) { - LOG_ERROR("error executing str7x flash write algorithm"); - retval = ERROR_FLASH_OPERATION_FAILED; break; } if (buf_get_u32(reg_params[4].value, 0, 32) != 0x00) { - retval = ERROR_FLASH_OPERATION_FAILED; + retval = str7x_result(bank); break; } @@ -431,10 +516,10 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t return retval; } -static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +static int str7x_write(struct flash_bank *bank, uint8_t *buffer, + uint32_t offset, uint32_t count) { struct target *target = bank->target; - struct str7x_flash_bank *str7x_info = bank->driver_priv; uint32_t dwords_remaining = (count / 8); uint32_t bytes_remaining = (count & 0x00000007); uint32_t address = bank->base + offset; @@ -482,21 +567,17 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset if (dwords_remaining > 0) { /* try using a block write */ - if ((retval = str7x_write_block(bank, buffer, offset, dwords_remaining)) != ERROR_OK) + if ((retval = str7x_write_block(bank, buffer, offset, + dwords_remaining)) != ERROR_OK) { if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { /* if block write failed (no sufficient working area), * we use normal (slow) single dword accesses */ LOG_WARNING("couldn't use block writes, falling back to single memory accesses"); - } - else if (retval == ERROR_FLASH_OPERATION_FAILED) + } else { - /* if an error occured, we examine the reason, and quit */ - retval = str7x_result(bank); - - LOG_ERROR("flash writing failed with error code: 0x%x", retval); - return ERROR_FLASH_OPERATION_FAILED; + return retval; } } else @@ -517,28 +598,27 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address); /* data word 1 */ - target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, buffer + bytes_written); + target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), + 4, 1, buffer + bytes_written); bytes_written += 4; /* data word 2 */ - target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), 4, 1, buffer + bytes_written); + target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), + 4, 1, buffer + bytes_written); bytes_written += 4; /* start programming cycle */ cmd = FLASH_DWPG | FLASH_WMS; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) - { - alive_sleep(1); - } + int err; + err = str7x_waitbusy(bank); + if (err != ERROR_OK) + return err; - retval = str7x_result(bank); - - if (retval & FLASH_PGER) - return ERROR_FLASH_OPERATION_FAILED; - else if (retval & FLASH_WPF) - return ERROR_FLASH_OPERATION_FAILED; + err = str7x_result(bank); + if (err != ERROR_OK) + return err; dwords_remaining--; address += 8; @@ -547,7 +627,7 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset if (bytes_remaining) { uint8_t last_dword[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - int i = 0; + i = 0; while (bytes_remaining > 0) { @@ -564,28 +644,27 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address); /* data word 1 */ - target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, last_dword); + target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), + 4, 1, last_dword); bytes_written += 4; /* data word 2 */ - target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), 4, 1, last_dword + 4); + target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), + 4, 1, last_dword + 4); bytes_written += 4; /* start programming cycle */ cmd = FLASH_DWPG | FLASH_WMS; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - while (((retval = str7x_status(bank)) & str7x_info->busy_bits)) - { - alive_sleep(1); - } - - retval = str7x_result(bank); + int err; + err = str7x_waitbusy(bank); + if (err != ERROR_OK) + return err; - if (retval & FLASH_PGER) - return ERROR_FLASH_OPERATION_FAILED; - else if (retval & FLASH_WPF) - return ERROR_FLASH_OPERATION_FAILED; + err = str7x_result(bank); + if (err != ERROR_OK) + return err; } return ERROR_OK; @@ -603,7 +682,7 @@ COMMAND_HANDLER(str7x_handle_part_id_command) } #endif -static int str7x_info(struct flash_bank *bank, char *buf, int buf_size) +static int get_str7x_info(struct flash_bank *bank, char *buf, int buf_size) { snprintf(buf, buf_size, "str7x flash driver info"); /* STR7x flash doesn't support sector protection interrogation. @@ -677,7 +756,8 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command) flash_cmd = FLASH_SPR; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd); target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFBC); - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), ~(1 << (15 + ProtectionLevel))); + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), + ~(1 << (15 + ProtectionLevel))); flash_cmd = FLASH_SPR | FLASH_WMS; target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd); } @@ -694,6 +774,7 @@ static const struct command_registration str7x_exec_command_handlers[] = { }, COMMAND_REGISTRATION_DONE }; + static const struct command_registration str7x_command_handlers[] = { { .name = "str7x", @@ -711,9 +792,10 @@ struct flash_driver str7x_flash = { .erase = str7x_erase, .protect = str7x_protect, .write = str7x_write, + .read = default_flash_read, .probe = str7x_probe, .auto_probe = str7x_probe, .erase_check = default_flash_blank_check, .protect_check = str7x_protect_check, - .info = str7x_info, + .info = get_str7x_info, };