X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fpic32mx.c;h=25f90fd6b0f6c8dcdb8f003565c2c0cf0d23d299;hp=a0d6f41ea64909780bac163618a43700d8188dde;hb=0f1163e823c6ca3c2a81fa296157f5dde0635fea;hpb=e43979e7020ea9d05a3c0a2af444f292eacb6c53 diff --git a/src/flash/pic32mx.c b/src/flash/pic32mx.c index a0d6f41ea6..25f90fd6b0 100644 --- a/src/flash/pic32mx.c +++ b/src/flash/pic32mx.c @@ -57,64 +57,14 @@ struct pic32mx_devs_s { { 0x00, NULL, 0 } }; -static int pic32mx_register_commands(struct command_context_s *cmd_ctx); -static int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); -static int pic32mx_erase(struct flash_bank_s *bank, int first, int last); -static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last); -static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count); static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32_t srcaddr); static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint32_t word); -static int pic32mx_probe(struct flash_bank_s *bank); -static int pic32mx_auto_probe(struct flash_bank_s *bank); -//static int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -static int pic32mx_protect_check(struct flash_bank_s *bank); -static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size); - -#if 0 -int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -#endif -static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -//static int pic32mx_chip_erase(struct flash_bank_s *bank); - -flash_driver_t pic32mx_flash = -{ - .name = "pic32mx", - .register_commands = pic32mx_register_commands, - .flash_bank_command = pic32mx_flash_bank_command, - .erase = pic32mx_erase, - .protect = pic32mx_protect, - .write = pic32mx_write, - .probe = pic32mx_probe, - .auto_probe = pic32mx_auto_probe, - .erase_check = default_flash_mem_blank_check, - .protect_check = pic32mx_protect_check, - .info = pic32mx_info -}; - -static int pic32mx_register_commands(struct command_context_s *cmd_ctx) -{ - command_t *pic32mx_cmd = register_command(cmd_ctx, NULL, "pic32mx", NULL, COMMAND_ANY, "pic32mx flash specific commands"); - -#if 0 - register_command(cmd_ctx, pic32mx_cmd, "lock", pic32mx_handle_lock_command, COMMAND_EXEC, - "lock device"); - register_command(cmd_ctx, pic32mx_cmd, "unlock", pic32mx_handle_unlock_command, COMMAND_EXEC, - "unlock protected device"); -#endif - register_command(cmd_ctx, pic32mx_cmd, "chip_erase", pic32mx_handle_chip_erase_command, COMMAND_EXEC, - "erase device"); - register_command(cmd_ctx, pic32mx_cmd, "pgm_word", pic32mx_handle_pgm_word_command, COMMAND_EXEC, - "program a word"); - return ERROR_OK; -} /* flash bank pic32mx 0 0 */ -static int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) +FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command) { - pic32mx_flash_bank_t *pic32mx_info; + struct pic32mx_flash_bank *pic32mx_info; if (argc < 6) { @@ -122,7 +72,7 @@ static int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *c return ERROR_FLASH_BANK_INVALID; } - pic32mx_info = malloc(sizeof(pic32mx_flash_bank_t)); + pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank)); bank->driver_priv = pic32mx_info; pic32mx_info->write_algorithm = NULL; @@ -133,7 +83,7 @@ static int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *c static uint32_t pic32mx_get_flash_status(flash_bank_t *bank) { - target_t *target = bank->target; + struct target *target = bank->target; uint32_t status; target_read_u32(target, PIC32MX_NVMCON, &status); @@ -148,21 +98,21 @@ static uint32_t pic32mx_wait_status_busy(flash_bank_t *bank, int timeout) /* wait for busy to clear */ while (((status = pic32mx_get_flash_status(bank)) & NVMCON_NVMWR) && (timeout-- > 0)) { - LOG_DEBUG("status: 0x%" PRIx32, status ); + LOG_DEBUG("status: 0x%" PRIx32, status); alive_sleep(1); } if (timeout <= 0) - LOG_DEBUG("timeout: status: 0x%" PRIx32, status ); + LOG_DEBUG("timeout: status: 0x%" PRIx32, status); return status; } static int pic32mx_nvm_exec(struct flash_bank_s *bank, uint32_t op, uint32_t timeout) { - target_t *target = bank->target; + struct target *target = bank->target; uint32_t status; - target_write_u32(target, PIC32MX_NVMCON, NVMCON_NVMWREN|op); + target_write_u32(target, PIC32MX_NVMCON, NVMCON_NVMWREN | op); /* unlock flash registers */ target_write_u32(target, PIC32MX_NVMKEY, NVMKEY1); @@ -181,7 +131,7 @@ static int pic32mx_nvm_exec(struct flash_bank_s *bank, uint32_t op, uint32_t tim static int pic32mx_protect_check(struct flash_bank_s *bank) { - target_t *target = bank->target; + struct target *target = bank->target; uint32_t devcfg0; int s; @@ -194,11 +144,11 @@ static int pic32mx_protect_check(struct flash_bank_s *bank) } target_read_u32(target, PIC32MX_DEVCFG0, &devcfg0); - if ((devcfg0 & (1<<28)) == 0) /* code protect bit */ + if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */ num_pages = 0xffff; /* All pages protected */ else if (bank->base == PIC32MX_KSEG1_BOOT_FLASH) { - if (devcfg0 & (1<<24)) + if (devcfg0 & (1 << 24)) num_pages = 0; /* All pages unprotected */ else num_pages = 0xffff; /* All pages protected */ @@ -215,7 +165,7 @@ static int pic32mx_protect_check(struct flash_bank_s *bank) static int pic32mx_erase(struct flash_bank_s *bank, int first, int last) { - target_t *target = bank->target; + struct target *target = bank->target; int i; uint32_t status; @@ -229,9 +179,9 @@ static int pic32mx_erase(struct flash_bank_s *bank, int first, int last) { LOG_DEBUG("Erasing entire program flash"); status = pic32mx_nvm_exec(bank, NVMCON_OP_PFM_ERASE, 50); - if ( status & NVMCON_NVMERR ) + if (status & NVMCON_NVMERR) return ERROR_FLASH_OPERATION_FAILED; - if ( status & NVMCON_LVDERR ) + if (status & NVMCON_LVDERR) return ERROR_FLASH_OPERATION_FAILED; return ERROR_OK; } @@ -245,9 +195,9 @@ static int pic32mx_erase(struct flash_bank_s *bank, int first, int last) status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10); - if ( status & NVMCON_NVMERR ) + if (status & NVMCON_NVMERR) return ERROR_FLASH_OPERATION_FAILED; - if ( status & NVMCON_LVDERR ) + if (status & NVMCON_LVDERR) return ERROR_FLASH_OPERATION_FAILED; bank->sectors[i].is_erased = 1; } @@ -257,8 +207,8 @@ static int pic32mx_erase(struct flash_bank_s *bank, int first, int last) static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last) { - pic32mx_flash_bank_t *pic32mx_info = NULL; - target_t *target = bank->target; + struct pic32mx_flash_bank *pic32mx_info = NULL; + struct target *target = bank->target; #if 0 uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF}; int i, reg, bit; @@ -313,7 +263,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la reg = (i / pic32mx_info->ppage_size) / 8; bit = (i / pic32mx_info->ppage_size) - (reg * 8); - if ( set ) + if (set) prot_reg[reg] &= ~(1 << bit); else prot_reg[reg] |= (1 << bit); @@ -327,7 +277,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la reg = (i / pic32mx_info->ppage_size) / 8; bit = (i / pic32mx_info->ppage_size) - (reg * 8); - if ( set ) + if (set) prot_reg[reg] &= ~(1 << bit); else prot_reg[reg] |= (1 << bit); @@ -350,14 +300,14 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count) { - target_t *target = bank->target; + struct target *target = bank->target; uint32_t buffer_size = 512; - working_area_t *source; + struct working_area *source; uint32_t address = bank->base + offset; int retval = ERROR_OK; #if 0 - pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv; - armv7m_algorithm_t armv7m_info; + struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv; + struct armv7m_algorithm armv7m_info; uint8_t pic32mx_flash_write_code[] = { /* write: */ @@ -388,7 +338,7 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; - if ((retval=target_write_buffer(target, pic32mx_info->write_algorithm->address, sizeof(pic32mx_flash_write_code), pic32mx_flash_write_code))!=ERROR_OK) + if ((retval = target_write_buffer(target, pic32mx_info->write_algorithm->address, sizeof(pic32mx_flash_write_code), pic32mx_flash_write_code)) != ERROR_OK) return retval; #endif @@ -409,7 +359,7 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3 { uint32_t status; - if ((retval = target_write_buffer(target, source->address, buffer_size, buffer))!=ERROR_OK) { + if ((retval = target_write_buffer(target, source->address, buffer_size, buffer)) != ERROR_OK) { LOG_ERROR("Failed to write row buffer (%d words) to RAM", (int)(buffer_size/4)); break; } @@ -434,13 +384,13 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3 } #endif status = pic32mx_write_row(bank, address, source->address); - if ( status & NVMCON_NVMERR ) { - LOG_ERROR("Flash write error NVMERR (status=0x%08" PRIx32 ")", status); + if (status & NVMCON_NVMERR) { + LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status); retval = ERROR_FLASH_OPERATION_FAILED; break; } - if ( status & NVMCON_LVDERR ) { - LOG_ERROR("Flash write error LVDERR (status=0x%08" PRIx32 ")", status); + if (status & NVMCON_LVDERR) { + LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status); retval = ERROR_FLASH_OPERATION_FAILED; break; } @@ -452,19 +402,19 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3 target_free_working_area(target, source); - while(count > 0) + while (count > 0) { uint32_t value; memcpy(&value, buffer, sizeof(uint32_t)); uint32_t status = pic32mx_write_word(bank, address, value); - if ( status & NVMCON_NVMERR ) { - LOG_ERROR("Flash write error NVMERR (status=0x%08" PRIx32 ")", status); + if (status & NVMCON_NVMERR) { + LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status); retval = ERROR_FLASH_OPERATION_FAILED; break; } - if ( status & NVMCON_LVDERR ) { - LOG_ERROR("Flash write error LVDERR (status=0x%08" PRIx32 ")", status); + if (status & NVMCON_LVDERR) { + LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status); retval = ERROR_FLASH_OPERATION_FAILED; break; } @@ -479,7 +429,7 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3 static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint32_t word) { - target_t *target = bank->target; + struct target *target = bank->target; if (bank->base >= PIC32MX_KSEG1_PGM_FLASH) target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address)); @@ -495,7 +445,7 @@ static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint3 */ static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32_t srcaddr) { - target_t *target = bank->target; + struct target *target = bank->target; LOG_DEBUG("addr: 0x%08" PRIx32 " srcaddr: 0x%08" PRIx32 "", address, srcaddr); @@ -564,9 +514,9 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of memcpy(&value, buffer + bytes_written, sizeof(uint32_t)); status = pic32mx_write_word(bank, address, value); - if ( status & NVMCON_NVMERR ) + if (status & NVMCON_NVMERR) return ERROR_FLASH_OPERATION_FAILED; - if ( status & NVMCON_LVDERR ) + if (status & NVMCON_LVDERR) return ERROR_FLASH_OPERATION_FAILED; bytes_written += 4; @@ -580,9 +530,9 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of memcpy(&value, buffer + bytes_written, bytes_remaining); status = pic32mx_write_word(bank, address, value); - if ( status & NVMCON_NVMERR ) + if (status & NVMCON_NVMERR) return ERROR_FLASH_OPERATION_FAILED; - if ( status & NVMCON_LVDERR ) + if (status & NVMCON_LVDERR) return ERROR_FLASH_OPERATION_FAILED; } @@ -591,10 +541,10 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of static int pic32mx_probe(struct flash_bank_s *bank) { - target_t *target = bank->target; - pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv; - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct target *target = bank->target; + struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; int i; uint16_t num_pages = 0; uint32_t device_id; @@ -603,14 +553,14 @@ static int pic32mx_probe(struct flash_bank_s *bank) pic32mx_info->probed = 0; device_id = ejtag_info->idcode; - LOG_INFO( "device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%02x, ver 0x%03x)", + LOG_INFO("device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%02x, ver 0x%03x)", device_id, - (unsigned)((device_id>>1)&0x7ff), - (unsigned)((device_id>>12)&0xff), - (unsigned)((device_id>>20)&0xfff) ); + (unsigned)((device_id >> 1)&0x7ff), + (unsigned)((device_id >> 12)&0xff), + (unsigned)((device_id >> 20)&0xfff)); - if (((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) { - LOG_WARNING( "Cannot identify target as a PIC32MX family." ); + if (((device_id >> 1)&0x7ff) != PIC32MX_MANUF_ID) { + LOG_WARNING("Cannot identify target as a PIC32MX family."); return ERROR_FLASH_OPERATION_FAILED; } @@ -620,13 +570,13 @@ static int pic32mx_probe(struct flash_bank_s *bank) num_pages = 12; } else { /* 0xBD000000: Program flash size varies with device */ - for(i=0; pic32mx_devs[i].name != NULL; i++) + for (i = 0; pic32mx_devs[i].name != NULL; i++) if (pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) { num_pages = pic32mx_devs[i].pfm_size; break; } if (pic32mx_devs[i].name == NULL) { - LOG_WARNING( "Cannot identify target as a PIC32MX family." ); + LOG_WARNING("Cannot identify target as a PIC32MX family."); return ERROR_FLASH_OPERATION_FAILED; } } @@ -646,7 +596,7 @@ static int pic32mx_probe(struct flash_bank_s *bank) } #endif - LOG_INFO( "flash size = %dkbytes", num_pages ); + LOG_INFO("flash size = %dkbytes", num_pages); /* calculate numbers of pages */ num_pages /= (page_size / 1024); @@ -657,7 +607,7 @@ static int pic32mx_probe(struct flash_bank_s *bank) bank->num_sectors = num_pages; bank->chip_width = 4; bank->bus_width = 4; - bank->sectors = malloc(sizeof(flash_sector_t) * num_pages); + bank->sectors = malloc(sizeof(struct flash_sector) * num_pages); for (i = 0; i < num_pages; i++) { @@ -674,14 +624,14 @@ static int pic32mx_probe(struct flash_bank_s *bank) static int pic32mx_auto_probe(struct flash_bank_s *bank) { - pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv; + struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv; if (pic32mx_info->probed) return ERROR_OK; return pic32mx_probe(bank); } #if 0 -static int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +COMMAND_HANDLER(pic32mx_handle_part_id_command) { return ERROR_OK; } @@ -689,22 +639,22 @@ static int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, cha static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size) { - target_t *target = bank->target; - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct target *target = bank->target; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; uint32_t device_id; int printed = 0, i; device_id = ejtag_info->idcode; - if (((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) { - snprintf(buf, buf_size, - "Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n", - (unsigned)((device_id>>1)&0x7ff), + if (((device_id >> 1)&0x7ff) != PIC32MX_MANUF_ID) { + snprintf(buf, buf_size, + "Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n", + (unsigned)((device_id >> 1)&0x7ff), PIC32MX_MANUF_ID); return ERROR_FLASH_OPERATION_FAILED; } - for(i=0; pic32mx_devs[i].name != NULL; i++) + for (i = 0; pic32mx_devs[i].name != NULL; i++) if (pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) { printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name); break; @@ -715,18 +665,17 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size) } buf += printed; buf_size -= printed; - printed = snprintf(buf, buf_size, " Ver: 0x%03x", - (unsigned)((device_id>>20)&0xfff)); + printed = snprintf(buf, buf_size, " Ver: 0x%03x", + (unsigned)((device_id >> 20)&0xfff)); return ERROR_OK; } #if 0 -int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +COMMAND_HANDLER(pic32mx_handle_lock_command) { - flash_bank_t *bank; - target_t *target = NULL; - pic32mx_flash_bank_t *pic32mx_info = NULL; + struct target *target = NULL; + struct pic32mx_flash_bank *pic32mx_info = NULL; if (argc < 1) { @@ -734,12 +683,10 @@ int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, ch return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; pic32mx_info = bank->driver_priv; @@ -771,11 +718,10 @@ int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, ch return ERROR_OK; } -int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +COMMAND_HANDLER(pic32mx_handle_unlock_command) { - flash_bank_t *bank; - target_t *target = NULL; - pic32mx_flash_bank_t *pic32mx_info = NULL; + struct target *target = NULL; + struct pic32mx_flash_bank *pic32mx_info = NULL; if (argc < 1) { @@ -783,12 +729,10 @@ int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; pic32mx_info = bank->driver_priv; @@ -821,7 +765,7 @@ int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, #if 0 static int pic32mx_chip_erase(struct flash_bank_s *bank) { - target_t *target = bank->target; + struct target *target = bank->target; #if 0 uint32_t status; #endif @@ -841,19 +785,19 @@ static int pic32mx_chip_erase(struct flash_bank_s *bank) /* chip erase flash memory */ target_write_u32(target, PIC32MX_FLASH_CR, FLASH_MER); - target_write_u32(target, PIC32MX_FLASH_CR, FLASH_MER|FLASH_STRT); + target_write_u32(target, PIC32MX_FLASH_CR, FLASH_MER | FLASH_STRT); status = pic32mx_wait_status_busy(bank, 10); target_write_u32(target, PIC32MX_FLASH_CR, FLASH_LOCK); - if ( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) { LOG_ERROR("pic32mx device protected"); return ERROR_OK; } - if ( status & FLASH_PGERR ) + if (status & FLASH_PGERR) { LOG_ERROR("pic32mx device programming failed"); return ERROR_OK; @@ -864,10 +808,9 @@ static int pic32mx_chip_erase(struct flash_bank_s *bank) } #endif -static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +COMMAND_HANDLER(pic32mx_handle_chip_erase_command) { #if 0 - flash_bank_t *bank; int i; if (argc != 0) @@ -876,12 +819,10 @@ static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, return ERROR_OK; } - bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); - return ERROR_OK; - } + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank); + if (ERROR_OK != retval) + return retval; if (pic32mx_chip_erase(bank) == ERROR_OK) { @@ -902,9 +843,8 @@ static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, return ERROR_OK; } -static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +COMMAND_HANDLER(pic32mx_handle_pgm_word_command) { - flash_bank_t *bank; uint32_t address, value; int status, res; @@ -914,16 +854,15 @@ static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, ch return ERROR_OK; } - address = strtoul(args[0], NULL, 0); - value = strtoul(args[1], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[0], address); + COMMAND_PARSE_NUMBER(u32, args[1], value); - bank = get_flash_bank_by_num(strtoul(args[2], NULL, 0)); - if (!bank) - { - command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[2]); - return ERROR_OK; - } - if (address < bank->base || address >= (bank->base+bank->size)) + flash_bank_t *bank; + int retval = flash_command_get_bank_by_num(cmd_ctx, args[2], &bank); + if (ERROR_OK != retval) + return retval; + + if (address < bank->base || address >= (bank->base + bank->size)) { command_print(cmd_ctx, "flash address '%s' is out of bounds", args[0]); return ERROR_OK; @@ -931,15 +870,50 @@ static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, ch res = ERROR_OK; status = pic32mx_write_word(bank, address, value); - if ( status & NVMCON_NVMERR ) + if (status & NVMCON_NVMERR) res = ERROR_FLASH_OPERATION_FAILED; - if ( status & NVMCON_LVDERR ) + if (status & NVMCON_LVDERR) res = ERROR_FLASH_OPERATION_FAILED; if (res == ERROR_OK) command_print(cmd_ctx, "pic32mx pgm word complete"); else - command_print(cmd_ctx, "pic32mx pgm word failed (status=0x%x)", status); + command_print(cmd_ctx, "pic32mx pgm word failed (status = 0x%x)", status); + + return ERROR_OK; +} +static int pic32mx_register_commands(struct command_context_s *cmd_ctx) +{ + command_t *pic32mx_cmd = register_command(cmd_ctx, NULL, "pic32mx", + NULL, COMMAND_ANY, "pic32mx flash specific commands"); +#if 0 + register_command(cmd_ctx, pic32mx_cmd, "lock", + pic32mx_handle_lock_command, COMMAND_EXEC, + "lock device"); + register_command(cmd_ctx, pic32mx_cmd, "unlock", + pic32mx_handle_unlock_command, COMMAND_EXEC, + "unlock protected device"); +#endif + register_command(cmd_ctx, pic32mx_cmd, "chip_erase", + pic32mx_handle_chip_erase_command, COMMAND_EXEC, + "erase device"); + register_command(cmd_ctx, pic32mx_cmd, "pgm_word", + pic32mx_handle_pgm_word_command, COMMAND_EXEC, + "program a word"); return ERROR_OK; } + +struct flash_driver pic32mx_flash = { + .name = "pic32mx", + .register_commands = &pic32mx_register_commands, + .flash_bank_command = &pic32mx_flash_bank_command, + .erase = &pic32mx_erase, + .protect = &pic32mx_protect, + .write = &pic32mx_write, + .probe = &pic32mx_probe, + .auto_probe = &pic32mx_auto_probe, + .erase_check = &default_flash_mem_blank_check, + .protect_check = &pic32mx_protect_check, + .info = &pic32mx_info, + };