X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fs3c2440_nand.c;h=44ac3c2abe2a11b94a9cb57d0d258cf35933fdc2;hp=85a50989ac35a1ca2130034985e89c936e303e84;hb=0f1163e823c6ca3c2a81fa296157f5dde0635fea;hpb=a931baa6191f49ffbb5843619ffdedd7eab69f6f

diff --git a/src/flash/s3c2440_nand.c b/src/flash/s3c2440_nand.c
index 85a50989ac..44ac3c2abe 100644
--- a/src/flash/s3c2440_nand.c
+++ b/src/flash/s3c2440_nand.c
@@ -31,39 +31,10 @@
 #include "s3c24xx_nand.h"
 
 
-static int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
-static int s3c2440_init(struct nand_device_s *device);
-//static int s3c2440_nand_ready(struct nand_device_s *device, int timeout);
-
-nand_flash_controller_t s3c2440_nand_controller =
-{
-	.name			= "s3c2440",
-	.nand_device_command	= s3c2440_nand_device_command,
-	.register_commands	= s3c24xx_register_commands,
-	.init			= s3c2440_init,
-	.reset			= s3c24xx_reset,
-	.command		= s3c24xx_command,
-	.address		= s3c24xx_address,
-	.write_data		= s3c24xx_write_data,
-	.read_data		= s3c24xx_read_data,
-	.write_page		= s3c24xx_write_page,
-	.read_page		= s3c24xx_read_page,
-	.write_block_data	= s3c2440_write_block_data,
-	.read_block_data	= s3c2440_read_block_data,
-	.controller_ready	= s3c24xx_controller_ready,
-	.nand_ready		= s3c2440_nand_ready,
-};
-
-static int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
-				char **args, int argc,
-				struct nand_device_s *device)
+NAND_DEVICE_COMMAND_HANDLER(s3c2440_nand_device_command)
 {
-	s3c24xx_nand_controller_t *info;
-
-	info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
-	if (info == NULL) {
-		return ERROR_NAND_DEVICE_INVALID;
-	}
+	struct s3c24xx_nand_controller *info;
+	CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
 
 	/* fill in the address fields for the core device */
 	info->cmd = S3C2440_NFCMD;
@@ -74,10 +45,10 @@ static int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *
 	return ERROR_OK;
 }
 
-static int s3c2440_init(struct nand_device_s *device)
+static int s3c2440_init(struct nand_device_s *nand)
 {
-	s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
-	target_t *target = s3c24xx_info->target;
+	struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
+	struct target *target = s3c24xx_info->target;
 
 	target_write_u32(target, S3C2410_NFCONF,
 			 S3C2440_NFCONF_TACLS(3) |
@@ -90,11 +61,11 @@ static int s3c2440_init(struct nand_device_s *device)
 	return ERROR_OK;
 }
 
-int s3c2440_nand_ready(struct nand_device_s *device, int timeout)
+int s3c2440_nand_ready(struct nand_device_s *nand, int timeout)
 {
-	s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
-	target_t *target = s3c24xx_info->target;
-	u8 status;
+	struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
+	struct target *target = s3c24xx_info->target;
+	uint8_t status;
 
 	if (target->state != TARGET_HALTED) {
 		LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -116,14 +87,14 @@ int s3c2440_nand_ready(struct nand_device_s *device, int timeout)
 
 /* use the fact we can read/write 4 bytes in one go via a single 32bit op */
 
-int s3c2440_read_block_data(struct nand_device_s *device, u8 *data, int data_size)
+int s3c2440_read_block_data(struct nand_device_s *nand, uint8_t *data, int data_size)
 {
-	s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
-	target_t *target = s3c24xx_info->target;
-	u32 nfdata = s3c24xx_info->data;
-	u32 tmp;
+	struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
+	struct target *target = s3c24xx_info->target;
+	uint32_t nfdata = s3c24xx_info->data;
+	uint32_t tmp;
 
-	LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, device, data, data_size);
+	LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, nand, data, data_size);
 
 	if (target->state != TARGET_HALTED) {
 		LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -152,12 +123,12 @@ int s3c2440_read_block_data(struct nand_device_s *device, u8 *data, int data_siz
 	return ERROR_OK;
 }
 
-int s3c2440_write_block_data(struct nand_device_s *device, u8 *data, int data_size)
+int s3c2440_write_block_data(struct nand_device_s *nand, uint8_t *data, int data_size)
 {
-	s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
-	target_t *target = s3c24xx_info->target;
-	u32 nfdata = s3c24xx_info->data;
-	u32 tmp;
+	struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
+	struct target *target = s3c24xx_info->target;
+	uint32_t nfdata = s3c24xx_info->data;
+	uint32_t tmp;
 
 	if (target->state != TARGET_HALTED) {
 		LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -181,3 +152,21 @@ int s3c2440_write_block_data(struct nand_device_s *device, u8 *data, int data_si
 
 	return ERROR_OK;
 }
+
+struct nand_flash_controller s3c2440_nand_controller = {
+		.name = "s3c2440",
+		.nand_device_command = &s3c2440_nand_device_command,
+		.register_commands = &s3c24xx_register_commands,
+		.init = &s3c2440_init,
+		.reset = &s3c24xx_reset,
+		.command = &s3c24xx_command,
+		.address = &s3c24xx_address,
+		.write_data = &s3c24xx_write_data,
+		.read_data = &s3c24xx_read_data,
+		.write_page = s3c24xx_write_page,
+		.read_page = s3c24xx_read_page,
+		.write_block_data = &s3c2440_write_block_data,
+		.read_block_data = &s3c2440_read_block_data,
+		.controller_ready = &s3c24xx_controller_ready,
+		.nand_ready = &s3c2440_nand_ready,
+	};