X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fs3c2440_nand.c;h=cd447104e346489db0a31bae170bfaa3e7843b0d;hp=41081bff79386b99b7179933025fbe77d2fb8a94;hb=310be8a838c9db6b67bc4d6d7d3c7ff41b32af4c;hpb=d47e1b8f362379d8a2307f49e2b42115a3f40524 diff --git a/src/flash/s3c2440_nand.c b/src/flash/s3c2440_nand.c index 41081bff79..cd447104e3 100644 --- a/src/flash/s3c2440_nand.c +++ b/src/flash/s3c2440_nand.c @@ -28,19 +28,12 @@ #include "config.h" #endif -#include "replacements.h" -#include "log.h" - -#include -#include - -#include "nand.h" #include "s3c24xx_nand.h" -#include "target.h" -int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device); -int s3c2440_init(struct nand_device_s *device); -int s3c2440_nand_ready(struct nand_device_s *device, int timeout); + +static int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device); +static int s3c2440_init(struct nand_device_s *device); +//static int s3c2440_nand_ready(struct nand_device_s *device, int timeout); nand_flash_controller_t s3c2440_nand_controller = { @@ -61,12 +54,12 @@ nand_flash_controller_t s3c2440_nand_controller = .nand_ready = s3c2440_nand_ready, }; -int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, +static int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device) { s3c24xx_nand_controller_t *info; - + info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device); if (info == NULL) { return ERROR_NAND_DEVICE_INVALID; @@ -77,11 +70,11 @@ int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, info->addr = S3C2440_NFADDR; info->data = S3C2440_NFDATA; info->nfstat = S3C2440_NFSTAT; - + return ERROR_OK; } -int s3c2440_init(struct nand_device_s *device) +static int s3c2440_init(struct nand_device_s *device) { s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv; target_t *target = s3c24xx_info->target; @@ -101,20 +94,20 @@ int s3c2440_nand_ready(struct nand_device_s *device, int timeout) { s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv; target_t *target = s3c24xx_info->target; - u8 status; + uint8_t status; if (target->state != TARGET_HALTED) { LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } - - do { + + do { target_read_u8(target, s3c24xx_info->nfstat, &status); - + if (status & S3C2440_NFSTAT_READY) return 1; - usleep(1000); + alive_sleep(1); } while (timeout-- > 0); @@ -123,7 +116,7 @@ int s3c2440_nand_ready(struct nand_device_s *device, int timeout) /* use the fact we can read/write 4 bytes in one go via a single 32bit op */ -int s3c2440_read_block_data(struct nand_device_s *device, u8 *data, int data_size) +int s3c2440_read_block_data(struct nand_device_s *device, uint8_t *data, int data_size) { s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv; target_t *target = s3c24xx_info->target; @@ -137,7 +130,7 @@ int s3c2440_read_block_data(struct nand_device_s *device, u8 *data, int data_siz return ERROR_NAND_OPERATION_FAILED; } - while (data_size >= 4) { + while (data_size >= 4) { target_read_u32(target, nfdata, &tmp); data[0] = tmp; @@ -159,7 +152,7 @@ int s3c2440_read_block_data(struct nand_device_s *device, u8 *data, int data_siz return ERROR_OK; } -int s3c2440_write_block_data(struct nand_device_s *device, u8 *data, int data_size) +int s3c2440_write_block_data(struct nand_device_s *device, uint8_t *data, int data_size) { s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv; target_t *target = s3c24xx_info->target; @@ -171,7 +164,7 @@ int s3c2440_write_block_data(struct nand_device_s *device, u8 *data, int data_si return ERROR_NAND_OPERATION_FAILED; } - while (data_size >= 4) { + while (data_size >= 4) { tmp = le_to_h_u32(data); target_write_u32(target, nfdata, tmp);