X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fstellaris.c;h=456d55bf34cc2b5db907763fc53cf28e2d5951f0;hp=cc85cafb1cc1b656297b29236e572de1888dcab1;hb=f876d5e9c769a288faa7fd14b7bf373363542aab;hpb=61933601bbcce64aa3c648ca6506dda39d2670f1 diff --git a/src/flash/stellaris.c b/src/flash/stellaris.c index cc85cafb1c..456d55bf34 100644 --- a/src/flash/stellaris.c +++ b/src/flash/stellaris.c @@ -2,6 +2,9 @@ * Copyright (C) 2006 by Magnus Lundin * * lundin@mlu.mine.nu * * * + * Copyright (C) 2008 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -25,40 +28,29 @@ #include "config.h" #endif -#include "replacements.h" - #include "stellaris.h" -#include "cortex_m3.h" - -#include "flash.h" -#include "target.h" -#include "log.h" +#include "armv7m.h" #include "binarybuffer.h" -#include "types.h" -#include -#include -#include #define DID0_VER(did0) ((did0>>28)&0x07) -int stellaris_register_commands(struct command_context_s *cmd_ctx); -int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); -int stellaris_erase(struct flash_bank_s *bank, int first, int last); -int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last); -int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); -int stellaris_auto_probe(struct flash_bank_s *bank); -int stellaris_probe(struct flash_bank_s *bank); -int stellaris_protect_check(struct flash_bank_s *bank); -int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size); - -int stellaris_read_part_info(struct flash_bank_s *bank); -u32 stellaris_get_flash_status(flash_bank_t *bank); -void stellaris_set_flash_mode(flash_bank_t *bank,int mode); -u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout); - -int stellaris_read_part_info(struct flash_bank_s *bank); -int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); -int stellaris_mass_erase(struct flash_bank_s *bank); +static int stellaris_register_commands(struct command_context_s *cmd_ctx); +static int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); +static int stellaris_erase(struct flash_bank_s *bank, int first, int last); +static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last); +static int stellaris_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count); +static int stellaris_auto_probe(struct flash_bank_s *bank); +static int stellaris_probe(struct flash_bank_s *bank); +static int stellaris_protect_check(struct flash_bank_s *bank); +static int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size); + +static int stellaris_read_part_info(struct flash_bank_s *bank); +static u32 stellaris_get_flash_status(flash_bank_t *bank); +static void stellaris_set_flash_mode(flash_bank_t *bank,int mode); +//static u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout); + +static int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); +static int stellaris_mass_erase(struct flash_bank_s *bank); flash_driver_t stellaris_flash = { @@ -75,7 +67,7 @@ flash_driver_t stellaris_flash = .info = stellaris_info }; -struct { +static struct { u32 partno; char *partname; } StellarisParts[] = @@ -231,7 +223,7 @@ struct { {0,"Unknown part"} }; -char * StellarisClassname[5] = +static char * StellarisClassname[5] = { "Sandstorm", "Fury", @@ -246,42 +238,42 @@ char * StellarisClassname[5] = /* flash_bank stellaris 0 0 */ -int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) +static int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) { stellaris_flash_bank_t *stellaris_info; - + if (argc < 6) { LOG_WARNING("incomplete flash_bank stellaris configuration"); return ERROR_FLASH_BANK_INVALID; } - + stellaris_info = calloc(sizeof(stellaris_flash_bank_t), 1); bank->base = 0x0; bank->driver_priv = stellaris_info; - + stellaris_info->target_name = "Unknown target"; - + /* part wasn't probed for info yet */ stellaris_info->did1 = 0; - - /* TODO Use an optional main oscillator clock rate in kHz from arg[6] */ + + /* TODO Use an optional main oscillator clock rate in kHz from arg[6] */ return ERROR_OK; } -int stellaris_register_commands(struct command_context_s *cmd_ctx) +static int stellaris_register_commands(struct command_context_s *cmd_ctx) { command_t *stm32x_cmd = register_command(cmd_ctx, NULL, "stellaris", NULL, COMMAND_ANY, "stellaris flash specific commands"); - + register_command(cmd_ctx, stm32x_cmd, "mass_erase", stellaris_handle_mass_erase_command, COMMAND_EXEC, "mass erase device"); return ERROR_OK; } -int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size) +static int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size) { int printed, device_class; stellaris_flash_bank_t *stellaris_info = bank->driver_priv; - + stellaris_read_part_info(bank); if (stellaris_info->did1 == 0) @@ -291,7 +283,7 @@ int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size) buf_size -= printed; return ERROR_FLASH_OPERATION_FAILED; } - + if (DID0_VER(stellaris_info->did0) > 0) { device_class = (stellaris_info->did0>>16) & 0xFF; @@ -299,14 +291,14 @@ int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size) else { device_class = 0; - } + } printed = snprintf(buf, buf_size, "\nLMI Stellaris information: Chip is class %i(%s) %s v%c.%i\n", device_class, StellarisClassname[device_class], stellaris_info->target_name, 'A' + ((stellaris_info->did0>>8) & 0xFF), (stellaris_info->did0) & 0xFF); buf += printed; buf_size -= printed; - printed = snprintf(buf, buf_size, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n", + printed = snprintf(buf, buf_size, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n", stellaris_info->did1, stellaris_info->did1, "ARMV7M", (1+((stellaris_info->dc0>>16) & 0xFFFF))/4, (1+(stellaris_info->dc0 & 0xFFFF))*2); buf += printed; buf_size -= printed; @@ -328,19 +320,19 @@ int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size) * chip identification and status * ***************************************************************************/ -u32 stellaris_get_flash_status(flash_bank_t *bank) +static u32 stellaris_get_flash_status(flash_bank_t *bank) { target_t *target = bank->target; u32 fmc; - + target_read_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, &fmc); - + return fmc; } /** Read clock configuration and set stellaris_info->usec_clocks*/ - -void stellaris_read_clock_info(flash_bank_t *bank) + +static void stellaris_read_clock_info(flash_bank_t *bank) { stellaris_flash_bank_t *stellaris_info = bank->driver_priv; target_t *target = bank->target; @@ -352,7 +344,7 @@ void stellaris_read_clock_info(flash_bank_t *bank) target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg); LOG_DEBUG("Stellaris PLLCFG %x", pllcfg); stellaris_info->rcc = rcc; - + sysdiv = (rcc>>23) & 0xF; usesysdiv = (rcc>>22) & 0x1; bypass = (rcc>>11) & 0x1; @@ -378,72 +370,74 @@ void stellaris_read_clock_info(flash_bank_t *bank) mainfreq = 0; break; } - + if (!bypass) mainfreq = 200000000; /* PLL out frec */ - + if (usesysdiv) stellaris_info->mck_freq = mainfreq/(1+sysdiv); else stellaris_info->mck_freq = mainfreq; - + /* Forget old flash timing */ stellaris_set_flash_mode(bank, 0); } /* Setup the timimg registers */ -void stellaris_set_flash_mode(flash_bank_t *bank,int mode) +static void stellaris_set_flash_mode(flash_bank_t *bank,int mode) { stellaris_flash_bank_t *stellaris_info = bank->driver_priv; target_t *target = bank->target; u32 usecrl = (stellaris_info->mck_freq/1000000ul-1); - LOG_DEBUG("usecrl = %i",usecrl); + LOG_DEBUG("usecrl = %i",usecrl); target_write_u32(target, SCB_BASE|USECRL, usecrl); } -u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout) +#if 0 +static u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout) { u32 status; - + /* Stellaris waits for cmdbit to clear */ while (((status = stellaris_get_flash_status(bank)) & waitbits) && (timeout-- > 0)) { LOG_DEBUG("status: 0x%x", status); - usleep(1000); + alive_sleep(1); } - + /* Flash errors are reflected in the FLASH_CRIS register */ return status; } /* Send one command to the flash controller */ -int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen) +static int stellaris_flash_command(struct flash_bank_s *bank,uint8_t cmd,uint16_t pagen) { u32 fmc; target_t *target = bank->target; - fmc = FMC_WRKEY | cmd; + fmc = FMC_WRKEY | cmd; target_write_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, fmc); LOG_DEBUG("Flash command: 0x%x", fmc); - if (stellaris_wait_status_busy(bank, cmd, 100)) + if (stellaris_wait_status_busy(bank, cmd, 100)) { return ERROR_FLASH_OPERATION_FAILED; - } + } return ERROR_OK; } +#endif /* Read device id register, main clock frequency register and fill in driver info structure */ -int stellaris_read_part_info(struct flash_bank_s *bank) +static int stellaris_read_part_info(struct flash_bank_s *bank) { stellaris_flash_bank_t *stellaris_info = bank->driver_priv; target_t *target = bank->target; u32 did0, did1, ver, fam, status; int i; - + /* Read and parse chip identification register */ target_read_u32(target, SCB_BASE|DID0, &did0); target_read_u32(target, SCB_BASE|DID1, &did1); @@ -476,9 +470,9 @@ int stellaris_read_part_info(struct flash_bank_s *bank) if (StellarisParts[i].partno == ((did1 >> 16) & 0xFF)) break; } - + stellaris_info->target_name = StellarisParts[i].partname; - + stellaris_info->did0 = did0; stellaris_info->did1 = did1; @@ -502,9 +496,9 @@ int stellaris_read_part_info(struct flash_bank_s *bank) /* Read main and master clock freqency register */ stellaris_read_clock_info(bank); - + status = stellaris_get_flash_status(bank); - + return ERROR_OK; } @@ -512,14 +506,15 @@ int stellaris_read_part_info(struct flash_bank_s *bank) * flash operations * ***************************************************************************/ -int stellaris_protect_check(struct flash_bank_s *bank) +static int stellaris_protect_check(struct flash_bank_s *bank) { u32 status; - + stellaris_flash_bank_t *stellaris_info = bank->driver_priv; if (bank->target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -533,22 +528,23 @@ int stellaris_protect_check(struct flash_bank_s *bank) LOG_WARNING("Cannot identify target as an AT91SAM"); return ERROR_FLASH_OPERATION_FAILED; } - + status = stellaris_get_flash_status(bank); stellaris_info->lockbits = status >> 16; - + return ERROR_OK; } -int stellaris_erase(struct flash_bank_s *bank, int first, int last) +static int stellaris_erase(struct flash_bank_s *bank, int first, int last) { int banknr; u32 flash_fmc, flash_cris; stellaris_flash_bank_t *stellaris_info = bank->driver_priv; target_t *target = bank->target; - + if (bank->target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -561,26 +557,26 @@ int stellaris_erase(struct flash_bank_s *bank, int first, int last) { LOG_WARNING("Cannot identify target as Stellaris"); return ERROR_FLASH_OPERATION_FAILED; - } - - if ((first < 0) || (last < first) || (last >= stellaris_info->num_pages)) + } + + if ((first < 0) || (last < first) || (last >= (int)stellaris_info->num_pages)) { return ERROR_FLASH_SECTOR_INVALID; } - - if ((first == 0) && (last == (stellaris_info->num_pages-1))) + + if ((first == 0) && (last == ((int)stellaris_info->num_pages-1))) { return stellaris_mass_erase(bank); } - + /* Configure the flash controller timing */ - stellaris_read_clock_info(bank); + stellaris_read_clock_info(bank); stellaris_set_flash_mode(bank,0); /* Clear and disable flash programming interrupts */ target_write_u32(target, FLASH_CIM, 0); target_write_u32(target, FLASH_MISC, PMISC|AMISC); - + for (banknr = first; banknr <= last; banknr++) { /* Address is first word in page */ @@ -602,31 +598,32 @@ int stellaris_erase(struct flash_bank_s *bank, int first, int last) target_write_u32(target, FLASH_CRIS, 0); return ERROR_FLASH_OPERATION_FAILED; } - + bank->sectors[banknr].is_erased = 1; } return ERROR_OK; } -int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last) +static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last) { u32 fmppe, flash_fmc, flash_cris; int lockregion; - + stellaris_flash_bank_t *stellaris_info = bank->driver_priv; target_t *target = bank->target; - + if (bank->target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - + if ((first < 0) || (last < first) || (last >= stellaris_info->num_lockbits)) { return ERROR_FLASH_SECTOR_INVALID; } - + if (stellaris_info->did1 == 0) { stellaris_read_part_info(bank); @@ -637,7 +634,7 @@ int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last) LOG_WARNING("Cannot identify target as an Stellaris MCU"); return ERROR_FLASH_OPERATION_FAILED; } - + /* Configure the flash controller timing */ stellaris_read_clock_info(bank); stellaris_set_flash_mode(bank, 0); @@ -646,15 +643,15 @@ int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last) for (lockregion = first; lockregion <= last; lockregion++) { if (set) - fmppe &= ~(1<lockbits); - + return ERROR_OK; } -u8 stellaris_write_code[] = +static uint8_t stellaris_write_code[] = { -/* - Call with : +/* + Call with : r0 = buffer address r1 = destination address - r2 = bytecount (in) - endaddr (work) - - Used registers: + r2 = bytecount (in) - endaddr (work) + + Used registers: r3 = pFLASH_CTRL_BASE r4 = FLASHWRITECMD r5 = #1 @@ -724,7 +721,7 @@ u8 stellaris_write_code[] = 0x01,0x00,0x42,0xA4 /* .word 0xA4420001 */ }; -int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 wcount) +static int stellaris_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 wcount) { target_t *target = bank->target; u32 buffer_size = 8192; @@ -734,7 +731,7 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 reg_param_t reg_params[3]; armv7m_algorithm_t armv7m_info; int retval = ERROR_OK; - + LOG_DEBUG("(bank=%p buffer=%p offset=%08X wcount=%08X)", bank, buffer, offset, wcount); @@ -751,69 +748,73 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) { LOG_DEBUG("called target_alloc_working_area(target=%p buffer_size=%08X source=%p)", - target, buffer_size, source); + target, buffer_size, source); buffer_size /= 2; if (buffer_size <= 256) { /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */ if (write_algorithm) target_free_working_area(target, write_algorithm); - + LOG_WARNING("no large enough working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } }; - + armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; armv7m_info.core_mode = ARMV7M_MODE_ANY; - + init_reg_param(®_params[0], "r0", 32, PARAM_OUT); init_reg_param(®_params[1], "r1", 32, PARAM_OUT); init_reg_param(®_params[2], "r2", 32, PARAM_OUT); - + while (wcount > 0) { u32 thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount; - + target_write_buffer(target, source->address, thisrun_count * 4, buffer); - + buf_set_u32(reg_params[0].value, 0, 32, source->address); buf_set_u32(reg_params[1].value, 0, 32, address); buf_set_u32(reg_params[2].value, 0, 32, 4*thisrun_count); LOG_INFO("Algorithm flash write %i words to 0x%x, %i remaining", thisrun_count, address, wcount); LOG_DEBUG("Algorithm flash write %i words to 0x%x, %i remaining", thisrun_count, address, wcount); - if ((retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params, write_algorithm->address, write_algorithm->address + sizeof(stellaris_write_code)-10, 10000, &armv7m_info)) != ERROR_OK) + if ((retval = target_run_algorithm(target, 0, NULL, 3, reg_params, write_algorithm->address, write_algorithm->address + sizeof(stellaris_write_code)-10, 10000, &armv7m_info)) != ERROR_OK) { LOG_ERROR("error executing stellaris flash write algorithm"); retval = ERROR_FLASH_OPERATION_FAILED; break; } - + buffer += thisrun_count * 4; address += thisrun_count * 4; wcount -= thisrun_count; } - + target_free_working_area(target, write_algorithm); target_free_working_area(target, source); - + destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); destroy_reg_param(®_params[2]); - + return retval; } -int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) +static int stellaris_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count) { stellaris_flash_bank_t *stellaris_info = bank->driver_priv; target_t *target = bank->target; u32 address = offset; - u32 flash_cris,flash_fmc; - u32 retval; - + u32 flash_cris, flash_fmc; + u32 words_remaining = (count / 4); + u32 bytes_remaining = (count & 0x00000003); + u32 bytes_written = 0; + int retval; + if (bank->target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -830,58 +831,58 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count LOG_WARNING("Cannot identify target as a Stellaris processor"); return ERROR_FLASH_OPERATION_FAILED; } - - if((offset & 3) || (count & 3)) + + if (offset & 0x3) { LOG_WARNING("offset size must be word aligned"); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } - + if (offset + count > bank->size) return ERROR_FLASH_DST_OUT_OF_BANK; - /* Configure the flash controller timing */ - stellaris_read_clock_info(bank); + /* Configure the flash controller timing */ + stellaris_read_clock_info(bank); stellaris_set_flash_mode(bank, 0); - + /* Clear and disable flash programming interrupts */ target_write_u32(target, FLASH_CIM, 0); target_write_u32(target, FLASH_MISC, PMISC|AMISC); /* multiple words to be programmed? */ - if (count > 0) + if (words_remaining > 0) { /* try using a block write */ - if ((retval = stellaris_write_block(bank, buffer, offset, count/4)) != ERROR_OK) + if ((retval = stellaris_write_block(bank, buffer, offset, words_remaining)) != ERROR_OK) { if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { /* if block write failed (no sufficient working area), - * we use normal (slow) single dword accesses */ + * we use normal (slow) single dword accesses */ LOG_WARNING("couldn't use block writes, falling back to single memory accesses"); } else if (retval == ERROR_FLASH_OPERATION_FAILED) { /* if an error occured, we examine the reason, and quit */ target_read_u32(target, FLASH_CRIS, &flash_cris); - + LOG_ERROR("flash writing failed with CRIS: 0x%x", flash_cris); return ERROR_FLASH_OPERATION_FAILED; } } else { - buffer += count * 4; - address += count * 4; - count = 0; + buffer += words_remaining * 4; + address += words_remaining * 4; + words_remaining = 0; } } - - while (count > 0) + + while (words_remaining > 0) { if (!(address & 0xff)) LOG_DEBUG("0x%x", address); - + /* Program one word */ target_write_u32(target, FLASH_FMA, address); target_write_buffer(target, FLASH_FMD, 4, buffer); @@ -891,13 +892,41 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count do { target_read_u32(target, FLASH_FMC, &flash_fmc); - } - while (flash_fmc & FMC_WRITE); + } while (flash_fmc & FMC_WRITE); + buffer += 4; address += 4; - count -= 4; + words_remaining--; } - /* Check acess violations */ + + if (bytes_remaining) + { + uint8_t last_word[4] = {0xff, 0xff, 0xff, 0xff}; + int i = 0; + + while(bytes_remaining > 0) + { + last_word[i++] = *(buffer + bytes_written); + bytes_remaining--; + bytes_written++; + } + + if (!(address & 0xff)) + LOG_DEBUG("0x%x", address); + + /* Program one word */ + target_write_u32(target, FLASH_FMA, address); + target_write_buffer(target, FLASH_FMD, 4, last_word); + target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE); + /* LOG_DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */ + /* Wait until write complete */ + do + { + target_read_u32(target, FLASH_FMC, &flash_fmc); + } while (flash_fmc & FMC_WRITE); + } + + /* Check access violations */ target_read_u32(target, FLASH_CRIS, &flash_cris); if (flash_cris & (AMASK)) { @@ -907,14 +936,15 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count return ERROR_OK; } -int stellaris_probe(struct flash_bank_s *bank) +static int stellaris_probe(struct flash_bank_s *bank) { /* we can't probe on an stellaris * if this is an stellaris, it has the configured flash */ - + if (bank->target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } @@ -922,7 +952,7 @@ int stellaris_probe(struct flash_bank_s *bank) return stellaris_read_part_info(bank); } -int stellaris_auto_probe(struct flash_bank_s *bank) +static int stellaris_auto_probe(struct flash_bank_s *bank) { stellaris_flash_bank_t *stellaris_info = bank->driver_priv; if (stellaris_info->did1) @@ -930,39 +960,40 @@ int stellaris_auto_probe(struct flash_bank_s *bank) return stellaris_probe(bank); } -int stellaris_mass_erase(struct flash_bank_s *bank) +static int stellaris_mass_erase(struct flash_bank_s *bank) { target_t *target = NULL; stellaris_flash_bank_t *stellaris_info = NULL; u32 flash_fmc; - + stellaris_info = bank->driver_priv; target = bank->target; - + if (target->state != TARGET_HALTED) { + LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } - + if (stellaris_info->did1 == 0) { stellaris_read_part_info(bank); } - + if (stellaris_info->did1 == 0) { LOG_WARNING("Cannot identify target as Stellaris"); return ERROR_FLASH_OPERATION_FAILED; } - + /* Configure the flash controller timing */ - stellaris_read_clock_info(bank); + stellaris_read_clock_info(bank); stellaris_set_flash_mode(bank, 0); /* Clear and disable flash programming interrupts */ target_write_u32(target, FLASH_CIM, 0); target_write_u32(target, FLASH_MISC, PMISC|AMISC); - + target_write_u32(target, FLASH_FMA, 0); target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE); /* Wait until erase complete */ @@ -971,7 +1002,7 @@ int stellaris_mass_erase(struct flash_bank_s *bank) target_read_u32(target, FLASH_FMC, &flash_fmc); } while (flash_fmc & FMC_MERASE); - + /* if device has > 128k, then second erase cycle is needed * this is only valid for older devices, but will not hurt */ if (stellaris_info->num_pages * stellaris_info->pagesize > 0x20000) @@ -985,37 +1016,42 @@ int stellaris_mass_erase(struct flash_bank_s *bank) } while (flash_fmc & FMC_MERASE); } - + return ERROR_OK; } -int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { flash_bank_t *bank; int i; - + if (argc < 1) { command_print(cmd_ctx, "stellaris mass_erase "); - return ERROR_OK; + return ERROR_OK; } - + bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0)); if (!bank) { command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]); return ERROR_OK; } - - stellaris_mass_erase(bank); - - /* set all sectors as erased */ - for (i = 0; i < bank->num_sectors; i++) + + if (stellaris_mass_erase(bank) == ERROR_OK) { - bank->sectors[i].is_erased = 1; + /* set all sectors as erased */ + for (i = 0; i < bank->num_sectors; i++) + { + bank->sectors[i].is_erased = 1; + } + + command_print(cmd_ctx, "stellaris mass erase complete"); } - - command_print(cmd_ctx, "stellaris mass erase complete"); - + else + { + command_print(cmd_ctx, "stellaris mass erase failed"); + } + return ERROR_OK; }