X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fstm32x.c;h=acbe116aca222e3031d77c8d9b830a2abc5b54b2;hp=bb41f73297d49923f253b7e798e4bf38feb07544;hb=8c634335b41a805998e5bae05328bb47057cce0b;hpb=8c290412d28f9eef568dac0cfc20ccd4a9eca4d5 diff --git a/src/flash/stm32x.c b/src/flash/stm32x.c index bb41f73297..acbe116aca 100644 --- a/src/flash/stm32x.c +++ b/src/flash/stm32x.c @@ -137,13 +137,6 @@ int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char WARNING("overriding flash base address for STM32x device with 0x08000000"); bank->base = 0x08000000; } - - stm32x_info->target = get_target_by_num(strtoul(args[5], NULL, 0)); - if (!stm32x_info->target) - { - ERROR("no target '%s' configured", args[5]); - exit(-1); - } stm32x_build_block_list(bank); @@ -154,8 +147,7 @@ int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char u32 stm32x_get_flash_status(flash_bank_t *bank) { - stm32x_flash_bank_t *stm32x_info = bank->driver_priv; - target_t *target = stm32x_info->target; + target_t *target = bank->target; u32 status; target_read_u32(target, STM32_FLASH_SR, &status); @@ -177,10 +169,158 @@ u32 stm32x_wait_status_busy(flash_bank_t *bank, int timeout) return status; } +int stm32x_read_options(struct flash_bank_s *bank) +{ + u32 optiondata; + stm32x_flash_bank_t *stm32x_info = NULL; + target_t *target = bank->target; + + stm32x_info = bank->driver_priv; + + /* read current option bytes */ + target_read_u32(target, STM32_FLASH_OBR, &optiondata); + + stm32x_info->option_bytes.user_options = (u16)0xFFF8|((optiondata >> 2) & 0x07); + stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5; + + if (optiondata & (1 << OPT_READOUT)) + INFO("Device Security Bit Set"); + + /* each bit refers to a 4bank protection */ + target_read_u32(target, STM32_FLASH_WRPR, &optiondata); + + stm32x_info->option_bytes.protection[0] = (u16)optiondata; + stm32x_info->option_bytes.protection[1] = (u16)(optiondata >> 8); + stm32x_info->option_bytes.protection[2] = (u16)(optiondata >> 16); + stm32x_info->option_bytes.protection[3] = (u16)(optiondata >> 24); + + return ERROR_OK; +} + +int stm32x_erase_options(struct flash_bank_s *bank) +{ + stm32x_flash_bank_t *stm32x_info = NULL; + target_t *target = bank->target; + u32 status; + + stm32x_info = bank->driver_priv; + + /* read current options */ + stm32x_read_options(bank); + + /* unlock flash registers */ + target_write_u32(target, STM32_FLASH_KEYR, KEY1); + target_write_u32(target, STM32_FLASH_KEYR, KEY2); + + /* unlock option flash registers */ + target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1); + target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2); + + /* erase option bytes */ + target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_OPTWRE); + target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_STRT|FLASH_OPTWRE); + + status = stm32x_wait_status_busy(bank, 10); + + if( status & FLASH_WRPRTERR ) + return ERROR_FLASH_OPERATION_FAILED; + if( status & FLASH_PGERR ) + return ERROR_FLASH_OPERATION_FAILED; + + /* clear readout protection and complementary option bytes + * this will also force a device unlock if set */ + stm32x_info->option_bytes.RDP = 0x5AA5; + + return ERROR_OK; +} + +int stm32x_write_options(struct flash_bank_s *bank) +{ + stm32x_flash_bank_t *stm32x_info = NULL; + target_t *target = bank->target; + u32 status; + + stm32x_info = bank->driver_priv; + + /* unlock flash registers */ + target_write_u32(target, STM32_FLASH_KEYR, KEY1); + target_write_u32(target, STM32_FLASH_KEYR, KEY2); + + /* unlock option flash registers */ + target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1); + target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2); + + /* program option bytes */ + target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG|FLASH_OPTWRE); + + /* write user option byte */ + target_write_u16(target, STM32_OB_USER, stm32x_info->option_bytes.user_options); + + status = stm32x_wait_status_busy(bank, 10); + + if( status & FLASH_WRPRTERR ) + return ERROR_FLASH_OPERATION_FAILED; + if( status & FLASH_PGERR ) + return ERROR_FLASH_OPERATION_FAILED; + + /* write protection byte 1 */ + target_write_u16(target, STM32_OB_WRP0, stm32x_info->option_bytes.protection[0]); + + status = stm32x_wait_status_busy(bank, 10); + + if( status & FLASH_WRPRTERR ) + return ERROR_FLASH_OPERATION_FAILED; + if( status & FLASH_PGERR ) + return ERROR_FLASH_OPERATION_FAILED; + + /* write protection byte 2 */ + target_write_u16(target, STM32_OB_WRP1, stm32x_info->option_bytes.protection[1]); + + status = stm32x_wait_status_busy(bank, 10); + + if( status & FLASH_WRPRTERR ) + return ERROR_FLASH_OPERATION_FAILED; + if( status & FLASH_PGERR ) + return ERROR_FLASH_OPERATION_FAILED; + + /* write protection byte 3 */ + target_write_u16(target, STM32_OB_WRP2, stm32x_info->option_bytes.protection[2]); + + status = stm32x_wait_status_busy(bank, 10); + + if( status & FLASH_WRPRTERR ) + return ERROR_FLASH_OPERATION_FAILED; + if( status & FLASH_PGERR ) + return ERROR_FLASH_OPERATION_FAILED; + + /* write protection byte 4 */ + target_write_u16(target, STM32_OB_WRP3, stm32x_info->option_bytes.protection[3]); + + status = stm32x_wait_status_busy(bank, 10); + + if( status & FLASH_WRPRTERR ) + return ERROR_FLASH_OPERATION_FAILED; + if( status & FLASH_PGERR ) + return ERROR_FLASH_OPERATION_FAILED; + + /* write readout protection bit */ + target_write_u16(target, STM32_OB_RDP, stm32x_info->option_bytes.RDP); + + status = stm32x_wait_status_busy(bank, 10); + + if( status & FLASH_WRPRTERR ) + return ERROR_FLASH_OPERATION_FAILED; + if( status & FLASH_PGERR ) + return ERROR_FLASH_OPERATION_FAILED; + + target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK); + + return ERROR_OK; +} + int stm32x_blank_check(struct flash_bank_s *bank, int first, int last) { - stm32x_flash_bank_t *stm32x_info = bank->driver_priv; - target_t *target = stm32x_info->target; + target_t *target = bank->target; u8 *buffer; int i; int nBytes; @@ -218,11 +358,11 @@ int stm32x_blank_check(struct flash_bank_s *bank, int first, int last) int stm32x_protect_check(struct flash_bank_s *bank) { - stm32x_flash_bank_t *stm32x_info = bank->driver_priv; - target_t *target = stm32x_info->target; + target_t *target = bank->target; u32 protection; int i, s; + int num_bits; if (target->state != TARGET_HALTED) { @@ -232,7 +372,10 @@ int stm32x_protect_check(struct flash_bank_s *bank) /* each bit refers to a 4bank protection */ target_read_u32(target, STM32_FLASH_WRPR, &protection); - for (i = 0; i < 32; i++) + /* each protection bit is for 4 1K pages */ + num_bits = (bank->num_sectors / 4); + + for (i = 0; i < num_bits; i++) { int set = 1; @@ -248,21 +391,20 @@ int stm32x_protect_check(struct flash_bank_s *bank) int stm32x_erase(struct flash_bank_s *bank, int first, int last) { - stm32x_flash_bank_t *stm32x_info = bank->driver_priv; - target_t *target = stm32x_info->target; + target_t *target = bank->target; int i; u32 status; - /* unlock flash registers */ - target_write_u32(target, STM32_FLASH_KEYR, KEY1); - target_write_u32(target, STM32_FLASH_KEYR, KEY2); - if (target->state != TARGET_HALTED) { return ERROR_TARGET_NOT_HALTED; } + /* unlock flash registers */ + target_write_u32(target, STM32_FLASH_KEYR, KEY1); + target_write_u32(target, STM32_FLASH_KEYR, KEY2); + for (i = first; i <= last; i++) { target_write_u32(target, STM32_FLASH_CR, FLASH_PER); @@ -285,25 +427,64 @@ int stm32x_erase(struct flash_bank_s *bank, int first, int last) int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last) { - stm32x_flash_bank_t *stm32x_info = bank->driver_priv; - target_t *target = stm32x_info->target; + stm32x_flash_bank_t *stm32x_info = NULL; + target_t *target = bank->target; + u16 prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF}; + int i, reg, bit; + int status; + u32 protection; + + stm32x_info = bank->driver_priv; if (target->state != TARGET_HALTED) { return ERROR_TARGET_NOT_HALTED; } - - return ERROR_OK; + + if ((first && (first % 4)) || ((last + 1) && (last + 1) % 4)) + { + WARNING("sector start/end incorrect - stm32 has 4K sector protection"); + return ERROR_FLASH_SECTOR_INVALID; + } + + /* each bit refers to a 4bank protection */ + target_read_u32(target, STM32_FLASH_WRPR, &protection); + + prot_reg[0] = (u16)protection; + prot_reg[1] = (u16)(protection >> 8); + prot_reg[2] = (u16)(protection >> 16); + prot_reg[3] = (u16)(protection >> 24); + + for (i = first; i <= last; i++) + { + reg = (i / 4) / 8; + bit = (i / 4) - (reg * 8); + + if( set ) + prot_reg[reg] &= ~(1 << bit); + else + prot_reg[reg] |= (1 << bit); + } + + if ((status = stm32x_erase_options(bank)) != ERROR_OK) + return status; + + stm32x_info->option_bytes.protection[0] = prot_reg[0]; + stm32x_info->option_bytes.protection[1] = prot_reg[1]; + stm32x_info->option_bytes.protection[2] = prot_reg[2]; + stm32x_info->option_bytes.protection[3] = prot_reg[3]; + + return stm32x_write_options(bank); } int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { stm32x_flash_bank_t *stm32x_info = bank->driver_priv; - target_t *target = stm32x_info->target; + target_t *target = bank->target; u32 buffer_size = 8192; working_area_t *source; u32 address = bank->base + offset; - reg_param_t reg_params[6]; + reg_param_t reg_params[4]; armv7m_algorithm_t armv7m_info; int retval = ERROR_OK; @@ -330,16 +511,13 @@ int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 co }; /* flash write code */ - if (!stm32x_info->write_algorithm) + if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), &stm32x_info->write_algorithm) != ERROR_OK) { - if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), &stm32x_info->write_algorithm) != ERROR_OK) - { - WARNING("no working area available, can't do block memory writes"); - return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; - }; - - target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code); - } + WARNING("no working area available, can't do block memory writes"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + }; + + target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code); /* memory buffer */ while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) @@ -364,8 +542,6 @@ int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 co init_reg_param(®_params[1], "r1", 32, PARAM_OUT); init_reg_param(®_params[2], "r2", 32, PARAM_OUT); init_reg_param(®_params[3], "r3", 32, PARAM_IN); - init_reg_param(®_params[4], "r4", 32, PARAM_IN); - init_reg_param(®_params[5], "r5", 32, PARAM_IN); while (count > 0) { @@ -377,7 +553,7 @@ int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 co buf_set_u32(reg_params[1].value, 0, 32, address); buf_set_u32(reg_params[2].value, 0, 32, thisrun_count); - if ((retval = target->type->run_algorithm(target, 0, NULL, 6, reg_params, stm32x_info->write_algorithm->address, \ + if ((retval = target->type->run_algorithm(target, 0, NULL, 4, reg_params, stm32x_info->write_algorithm->address, \ stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10), 10000, &armv7m_info)) != ERROR_OK) { ERROR("error executing str7x flash write algorithm"); @@ -396,21 +572,19 @@ int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 co } target_free_working_area(target, source); + target_free_working_area(target, stm32x_info->write_algorithm); destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); destroy_reg_param(®_params[2]); destroy_reg_param(®_params[3]); - destroy_reg_param(®_params[4]); - destroy_reg_param(®_params[5]); return retval; } int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { - stm32x_flash_bank_t *stm32x_info = bank->driver_priv; - target_t *target = stm32x_info->target; + target_t *target = bank->target; u32 words_remaining = (count / 2); u32 bytes_remaining = (count & 0x00000001); u32 address = bank->base + offset; @@ -528,7 +702,6 @@ int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size) int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { flash_bank_t *bank; - u32 status; target_t *target = NULL; stm32x_flash_bank_t *stm32x_info = NULL; @@ -547,46 +720,28 @@ int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, cha stm32x_info = bank->driver_priv; - target = stm32x_info->target; + target = bank->target; if (target->state != TARGET_HALTED) { return ERROR_TARGET_NOT_HALTED; } - /* unlock flash registers */ - target_write_u32(target, STM32_FLASH_KEYR, KEY1); - target_write_u32(target, STM32_FLASH_KEYR, KEY2); - - /* unlock option flash registers */ - target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1); - target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2); - - /* erase option bytes */ - target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_OPTWRE); - target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_STRT|FLASH_OPTWRE); - - status = stm32x_wait_status_busy(bank, 10); - - if( status & FLASH_WRPRTERR ) - return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) - return ERROR_FLASH_OPERATION_FAILED; - - /* program option bytes */ - target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG|FLASH_OPTWRE); - - /* set readout protection */ - target_write_u16(target, STM32_OB_ADR, 0); - - status = stm32x_wait_status_busy(bank, 10); + if (stm32x_erase_options(bank) != ERROR_OK) + { + command_print(cmd_ctx, "stm32x failed to erase options"); + return ERROR_OK; + } + + /* set readout protection */ + stm32x_info->option_bytes.RDP = 0; - if( status & FLASH_WRPRTERR ) - return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) - return ERROR_FLASH_OPERATION_FAILED; + if (stm32x_write_options(bank) != ERROR_OK) + { + command_print(cmd_ctx, "stm32x failed to lock device"); + return ERROR_OK; + } - target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK); command_print(cmd_ctx, "stm32x locked"); return ERROR_OK; @@ -595,7 +750,6 @@ int stm32x_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, cha int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { flash_bank_t *bank; - u32 status; target_t *target = NULL; stm32x_flash_bank_t *stm32x_info = NULL; @@ -614,46 +768,25 @@ int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, c stm32x_info = bank->driver_priv; - target = stm32x_info->target; + target = bank->target; if (target->state != TARGET_HALTED) { return ERROR_TARGET_NOT_HALTED; } + + if (stm32x_erase_options(bank) != ERROR_OK) + { + command_print(cmd_ctx, "stm32x failed to unlock device"); + return ERROR_OK; + } - /* unlock flash registers */ - target_write_u32(target, STM32_FLASH_KEYR, KEY1); - target_write_u32(target, STM32_FLASH_KEYR, KEY2); - - /* unlock option flash registers */ - target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1); - target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2); - - /* erase option bytes */ - target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_OPTWRE); - target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_STRT|FLASH_OPTWRE); - - status = stm32x_wait_status_busy(bank, 10); - - if( status & FLASH_WRPRTERR ) - return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) - return ERROR_FLASH_OPERATION_FAILED; - - /* program option bytes */ - target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG|FLASH_OPTWRE); - - /* clear readout protection and complementary option bytes */ - target_write_u16(target, STM32_OB_ADR, 0x5AA5); - - status = stm32x_wait_status_busy(bank, 10); - - if( status & FLASH_WRPRTERR ) - return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) - return ERROR_FLASH_OPERATION_FAILED; + if (stm32x_write_options(bank) != ERROR_OK) + { + command_print(cmd_ctx, "stm32x failed to lock device"); + return ERROR_OK; + } - target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK); command_print(cmd_ctx, "stm32x unlocked"); return ERROR_OK; @@ -681,22 +814,13 @@ int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char * stm32x_info = bank->driver_priv; - target = stm32x_info->target; + target = bank->target; if (target->state != TARGET_HALTED) { return ERROR_TARGET_NOT_HALTED; } - //target_read_u32(target, STM32_OB_ADR, &optionbyte); - //command_print(cmd_ctx, "Option Byte 0: 0x%x", optionbyte); - //target_read_u32(target, STM32_OB_ADR+4, &optionbyte); - //command_print(cmd_ctx, "Option Byte 1: 0x%x", optionbyte); - //target_read_u32(target, STM32_OB_ADR+8, &optionbyte); - //command_print(cmd_ctx, "Option Byte 2: 0x%x", optionbyte); - //target_read_u32(target, STM32_OB_ADR+12, &optionbyte); - //command_print(cmd_ctx, "Option Byte 3: 0x%x", optionbyte); - target_read_u32(target, STM32_FLASH_OBR, &optionbyte); command_print(cmd_ctx, "Option Byte: 0x%x", optionbyte); @@ -732,11 +856,10 @@ int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char target_t *target = NULL; stm32x_flash_bank_t *stm32x_info = NULL; u16 optionbyte = 0xF8; - u32 status; if (argc < 4) { - command_print(cmd_ctx, "stm32x options_write "); + command_print(cmd_ctx, "stm32x options_write "); return ERROR_OK; } @@ -749,7 +872,7 @@ int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char stm32x_info = bank->driver_priv; - target = stm32x_info->target; + target = bank->target; if (target->state != TARGET_HALTED) { @@ -783,38 +906,31 @@ int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx, char optionbyte &= ~(1<<2); } - /* unlock flash registers */ - target_write_u32(target, STM32_FLASH_KEYR, KEY1); - target_write_u32(target, STM32_FLASH_KEYR, KEY2); - - /* unlock option flash registers */ - target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1); - target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2); - - /* program option bytes */ - target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG|FLASH_OPTWRE); + if (stm32x_erase_options(bank) != ERROR_OK) + { + command_print(cmd_ctx, "stm32x failed to erase options"); + return ERROR_OK; + } - /* write option byte */ - target_write_u16(target, STM32_OB_ADR + 2, optionbyte); + stm32x_info->option_bytes.user_options = optionbyte; - status = stm32x_wait_status_busy(bank, 10); - - if( status & FLASH_WRPRTERR ) - return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) - return ERROR_FLASH_OPERATION_FAILED; + if (stm32x_write_options(bank) != ERROR_OK) + { + command_print(cmd_ctx, "stm32x failed to write options"); + return ERROR_OK; + } - target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK); + command_print(cmd_ctx, "stm32x write options complete"); return ERROR_OK; } int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - flash_bank_t *bank; - u32 status; target_t *target = NULL; stm32x_flash_bank_t *stm32x_info = NULL; + flash_bank_t *bank; + u32 status; if (argc < 1) { @@ -831,7 +947,7 @@ int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cm stm32x_info = bank->driver_priv; - target = stm32x_info->target; + target = bank->target; if (target->state != TARGET_HALTED) { @@ -848,12 +964,21 @@ int stm32x_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cm status = stm32x_wait_status_busy(bank, 10); + target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK); + if( status & FLASH_WRPRTERR ) - return ERROR_FLASH_OPERATION_FAILED; + { + command_print(cmd_ctx, "stm32x device protected"); + return ERROR_OK; + } + if( status & FLASH_PGERR ) - return ERROR_FLASH_OPERATION_FAILED; + { + command_print(cmd_ctx, "stm32x device programming failed"); + return ERROR_OK; + } - target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK); + command_print(cmd_ctx, "stm32x mass erase complete"); return ERROR_OK; }