X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fstr7x.c;h=3574a897d47890d378ea10bfb49206510c0137ed;hp=0419394e753bbfdc67c0be63ce91a5ec0e6006d7;hb=bcb0124b1501fb42659cdc2a343dec173aaa196a;hpb=b855855445489c43de2b796f1ac921e518d787bd
diff --git a/src/flash/str7x.c b/src/flash/str7x.c
index 0419394e75..3574a897d4 100644
--- a/src/flash/str7x.c
+++ b/src/flash/str7x.c
@@ -59,6 +59,8 @@ int str7x_protect_check(struct flash_bank_s *bank);
int str7x_erase_check(struct flash_bank_s *bank);
int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size);
+int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+
flash_driver_t str7x_flash =
{
.name = "str7x",
@@ -68,6 +70,7 @@ flash_driver_t str7x_flash =
.protect = str7x_protect,
.write = str7x_write,
.probe = str7x_probe,
+ .auto_probe = str7x_probe,
.erase_check = str7x_erase_check,
.protect_check = str7x_protect_check,
.info = str7x_info
@@ -75,7 +78,11 @@ flash_driver_t str7x_flash =
int str7x_register_commands(struct command_context_s *cmd_ctx)
{
-
+ command_t *str7x_cmd = register_command(cmd_ctx, NULL, "str7x", NULL, COMMAND_ANY, NULL);
+
+ register_command(cmd_ctx, str7x_cmd, "disable_jtag", str7x_handle_disable_jtag_command, COMMAND_EXEC,
+ "disable jtag access");
+
return ERROR_OK;
}
@@ -150,7 +157,7 @@ int str7x_build_block_list(struct flash_bank_s *bank)
return ERROR_OK;
}
-/* flash bank str7x 0 0
+/* flash bank str7x 0 0
*/
int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
@@ -165,37 +172,46 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
str7x_info = malloc(sizeof(str7x_flash_bank_t));
bank->driver_priv = str7x_info;
- if (strcmp(args[5], "STR71x") == 0)
+ /* set default bits for str71x flash */
+ str7x_info->bank1 = 1;
+ str7x_info->busy_bits = (FLASH_LOCK|FLASH_BSYA1|FLASH_BSYA0);
+ str7x_info->disable_bit = (1<<1);
+
+ if (strcmp(args[6], "STR71x") == 0)
{
- str7x_info->bank1 = 1;
if (bank->base != 0x40000000)
{
WARNING("overriding flash base address for STR71x device with 0x40000000");
bank->base = 0x40000000;
}
}
- else if (strcmp(args[5], "STR73x") == 0)
+ else if (strcmp(args[6], "STR73x") == 0)
{
str7x_info->bank1 = 0;
+ str7x_info->busy_bits = (FLASH_LOCK|FLASH_BSYA0);
+
if (bank->base != 0x80000000)
{
WARNING("overriding flash base address for STR73x device with 0x80000000");
bank->base = 0x80000000;
}
}
+ else if (strcmp(args[6], "STR75x") == 0)
+ {
+ str7x_info->disable_bit = (1<<0);
+
+ if (bank->base != 0x20000000)
+ {
+ WARNING("overriding flash base address for STR75x device with 0x20000000");
+ bank->base = 0x20000000;
+ }
+ }
else
{
- ERROR("unknown STR7x variant");
+ ERROR("unknown STR7x variant: '%s'", args[6]);
free(str7x_info);
return ERROR_FLASH_BANK_INVALID;
}
-
- str7x_info->target = get_target_by_num(strtoul(args[6], NULL, 0));
- if (!str7x_info->target)
- {
- ERROR("no target '%s' configured", args[6]);
- exit(-1);
- }
str7x_build_block_list(bank);
@@ -206,8 +222,7 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
u32 str7x_status(struct flash_bank_s *bank)
{
- str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
u32 retval;
target_read_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), &retval);
@@ -217,8 +232,7 @@ u32 str7x_status(struct flash_bank_s *bank)
u32 str7x_result(struct flash_bank_s *bank)
{
- str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
u32 retval;
target_read_u32(target, str7x_get_flash_adr(bank, FLASH_ER), &retval);
@@ -228,8 +242,7 @@ u32 str7x_result(struct flash_bank_s *bank)
int str7x_blank_check(struct flash_bank_s *bank, int first, int last)
{
- str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
u8 *buffer;
int i;
int nBytes;
@@ -237,7 +250,7 @@ int str7x_blank_check(struct flash_bank_s *bank, int first, int last)
if ((first < 0) || (last > bank->num_sectors))
return ERROR_FLASH_SECTOR_INVALID;
- if (str7x_info->target->state != TARGET_HALTED)
+ if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
@@ -268,12 +281,12 @@ int str7x_blank_check(struct flash_bank_s *bank, int first, int last)
int str7x_protect_check(struct flash_bank_s *bank)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
int i;
u32 retval;
- if (str7x_info->target->state != TARGET_HALTED)
+ if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
@@ -294,18 +307,13 @@ int str7x_protect_check(struct flash_bank_s *bank)
int str7x_erase(struct flash_bank_s *bank, int first, int last)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
int i;
u32 cmd;
u32 retval;
u32 b0_sectors = 0, b1_sectors = 0;
- if (str7x_info->target->state != TARGET_HALTED)
- {
- return ERROR_TARGET_NOT_HALTED;
- }
-
for (i = first; i <= last; i++)
{
if (str7x_info->sector_bank[i] == 0)
@@ -332,7 +340,7 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last)
cmd = FLASH_SER|FLASH_WMS;
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
- while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){
+ while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){
usleep(1000);
}
@@ -361,7 +369,7 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last)
cmd = FLASH_SER|FLASH_WMS;
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
- while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){
+ while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){
usleep(1000);
}
@@ -383,13 +391,13 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last)
int str7x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
int i;
u32 cmd;
u32 retval;
u32 protect_blocks;
- if (str7x_info->target->state != TARGET_HALTED)
+ if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
@@ -417,7 +425,7 @@ int str7x_protect(struct flash_bank_s *bank, int set, int first, int last)
cmd = FLASH_SPR|FLASH_WMS;
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
- while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){
+ while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){
usleep(1000);
}
@@ -436,13 +444,13 @@ int str7x_protect(struct flash_bank_s *bank, int set, int first, int last)
int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
u32 buffer_size = 8192;
working_area_t *source;
u32 address = bank->base + offset;
- reg_param_t reg_params[5];
+ reg_param_t reg_params[6];
armv4_5_algorithm_t armv4_5_info;
- int retval;
+ int retval = ERROR_OK;
u32 str7x_flash_write_code[] = {
/* write: */
@@ -457,7 +465,7 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
0xe5824000, /* str r4, [r2, #0x0] */
/* busy: */
0xe5924000, /* ldr r4, [r2, #0x0] */
- 0xe3140016, /* tst r4, #0x16 */
+ 0xe1140005, /* tst r4, r5 */
0x1afffffc, /* bne busy */
0xe5924014, /* ldr r4, [r2, #0x14] */
0xe31400ff, /* tst r4, #0xff */
@@ -470,24 +478,14 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
0xeafffffe, /* b exit */
};
- u8 str7x_flash_write_code_buf[80];
- int i;
-
/* flash write code */
- if (!str7x_info->write_algorithm)
+ if (target_alloc_working_area(target, 4 * 20, &str7x_info->write_algorithm) != ERROR_OK)
{
- if (target_alloc_working_area(target, 4 * 20, &str7x_info->write_algorithm) != ERROR_OK)
- {
- WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- };
-
- /* convert flash writing code into a buffer in target endianness */
- for (i = 0; i < 20; i++)
- target_buffer_set_u32(target, str7x_flash_write_code_buf + i*4, str7x_flash_write_code[i]);
-
- target_write_buffer(target, str7x_info->write_algorithm->address, 20 * 4, str7x_flash_write_code_buf);
- }
+ WARNING("no working area available, can't do block memory writes");
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ };
+
+ target_write_buffer(target, str7x_info->write_algorithm->address, 20 * 4, (u8*)str7x_flash_write_code);
/* memory buffer */
while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
@@ -502,7 +500,7 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
WARNING("no large enough working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
- };
+ }
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
@@ -513,6 +511,7 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
init_reg_param(®_params[4], "r4", 32, PARAM_IN);
+ init_reg_param(®_params[5], "r5", 32, PARAM_OUT);
while (count > 0)
{
@@ -524,16 +523,18 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
buf_set_u32(reg_params[1].value, 0, 32, address);
buf_set_u32(reg_params[2].value, 0, 32, str7x_get_flash_adr(bank, FLASH_CR0));
buf_set_u32(reg_params[3].value, 0, 32, thisrun_count);
+ buf_set_u32(reg_params[5].value, 0, 32, str7x_info->busy_bits);
- if ((retval = target->type->run_algorithm(target, 0, NULL, 5, reg_params, str7x_info->write_algorithm->address, str7x_info->write_algorithm->address + (19 * 4), 10000, &armv4_5_info)) != ERROR_OK)
+ if ((retval = target->type->run_algorithm(target, 0, NULL, 6, reg_params, str7x_info->write_algorithm->address, str7x_info->write_algorithm->address + (19 * 4), 10000, &armv4_5_info)) != ERROR_OK)
{
ERROR("error executing str7x flash write algorithm");
- return ERROR_FLASH_OPERATION_FAILED;
+ break;
}
if (buf_get_u32(reg_params[4].value, 0, 32) != 0x00)
{
- return ERROR_FLASH_OPERATION_FAILED;
+ retval = ERROR_FLASH_OPERATION_FAILED;
+ break;
}
buffer += thisrun_count * 8;
@@ -542,20 +543,22 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou
}
target_free_working_area(target, source);
+ target_free_working_area(target, str7x_info->write_algorithm);
destroy_reg_param(®_params[0]);
destroy_reg_param(®_params[1]);
destroy_reg_param(®_params[2]);
destroy_reg_param(®_params[3]);
destroy_reg_param(®_params[4]);
+ destroy_reg_param(®_params[5]);
- return ERROR_OK;
+ return retval;
}
int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
+ target_t *target = bank->target;
str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
u32 dwords_remaining = (count / 8);
u32 bytes_remaining = (count & 0x00000007);
u32 address = bank->base + offset;
@@ -565,11 +568,6 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
u32 check_address = offset;
int i;
- if (str7x_info->target->state != TARGET_HALTED)
- {
- return ERROR_TARGET_NOT_HALTED;
- }
-
if (offset & 0x7)
{
WARNING("offset 0x%x breaks required 8-byte alignment", offset);
@@ -648,7 +646,7 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
cmd = FLASH_DWPG | FLASH_WMS;
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
- while (((retval = str7x_status(bank)) & (FLASH_BSYA1 | FLASH_BSYA2)))
+ while (((retval = str7x_status(bank)) & str7x_info->busy_bits))
{
usleep(1000);
}
@@ -695,7 +693,7 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
cmd = FLASH_DWPG | FLASH_WMS;
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
- while (((retval = str7x_status(bank)) & (FLASH_BSYA1 | FLASH_BSYA2)))
+ while (((retval = str7x_status(bank)) & str7x_info->busy_bits))
{
usleep(1000);
}
@@ -731,3 +729,76 @@ int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size)
snprintf(buf, buf_size, "str7x flash driver info" );
return ERROR_OK;
}
+
+int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+ flash_bank_t *bank;
+ target_t *target = NULL;
+ str7x_flash_bank_t *str7x_info = NULL;
+
+ u32 flash_cmd;
+ u32 retval;
+ u16 ProtectionLevel = 0;
+ u16 ProtectionRegs;
+
+ if (argc < 1)
+ {
+ command_print(cmd_ctx, "str7x disable_jtag ");
+ return ERROR_OK;
+ }
+
+ bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
+ if (!bank)
+ {
+ command_print(cmd_ctx, "str7x disable_jtag ok");
+ return ERROR_OK;
+ }
+
+ str7x_info = bank->driver_priv;
+
+ target = bank->target;
+
+ if (target->state != TARGET_HALTED)
+ {
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
+ /* first we get protection status */
+ target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR0), &retval);
+
+ if (!(retval & str7x_info->disable_bit))
+ {
+ ProtectionLevel = 1;
+ }
+
+ target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR1), &retval);
+ ProtectionRegs = ~(retval >> 16);
+
+ while (((ProtectionRegs) != 0) && (ProtectionLevel < 16))
+ {
+ ProtectionRegs >>= 1;
+ ProtectionLevel++;
+ }
+
+ if (ProtectionLevel == 0)
+ {
+ flash_cmd = FLASH_SPR;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFB8);
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), 0xFFFFFFFD);
+ flash_cmd = FLASH_SPR | FLASH_WMS;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
+ }
+ else
+ {
+ flash_cmd = FLASH_SPR;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFBC);
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), ~(1<<(15+ProtectionLevel)));
+ flash_cmd = FLASH_SPR | FLASH_WMS;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
+ }
+
+ return ERROR_OK;
+}
+