X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fflash%2Fstr7x.h;h=ef2d2e339f406c9bf8152e5acccc38647b09a085;hp=bbb64eb9f39fb8654be84043f21f4b618211516e;hb=774d71f2cf7bce27a01424fad360cbadebf20459;hpb=ce8768f46345e3f88ca6f8f0b88603d79e22d89a

diff --git a/src/flash/str7x.h b/src/flash/str7x.h
index bbb64eb9f3..ef2d2e339f 100644
--- a/src/flash/str7x.h
+++ b/src/flash/str7x.h
@@ -2,6 +2,9 @@
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
+ *   Copyright (C) 2008 by Spencer Oliver                                  *
+ *   spen@spen-soft.co.uk                                                  *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -21,17 +24,15 @@
 #define STR7X_H
 
 #include "flash.h"
-#include "target.h"
 
-typedef struct str7x_flash_bank_s
+struct str7x_flash_bank
 {
-	int bank1;
-	u32 *sector_bank;
-	u32 *sector_bits;
-	u32 disable_bit;
-	u32 busy_bits;
+	uint32_t *sector_bits;
+	uint32_t disable_bit;
+	uint32_t busy_bits;
+	uint32_t register_base;
 	working_area_t *write_algorithm;
-} str7x_flash_bank_t;
+};
 
 enum str7x_status_codes
 {
@@ -51,21 +52,21 @@ enum str7x_status_codes
 
 /*  Flash registers */
 
-#define FLASH_CR0		0x00100000
-#define FLASH_CR1		0x00100004
-#define FLASH_DR0		0x00100008
-#define FLASH_DR1		0x0010000C
-#define FLASH_AR		0x00100010
-#define FLASH_ER		0x00100014
-#define FLASH_NVWPAR	0x0010DFB0
-#define FLASH_NVAPR0 	0x0010DFB8
-#define FLASH_NVAPR1 	0x0010DFBC
+#define FLASH_CR0		0x00000000
+#define FLASH_CR1		0x00000004
+#define FLASH_DR0		0x00000008
+#define FLASH_DR1		0x0000000C
+#define FLASH_AR		0x00000010
+#define FLASH_ER		0x00000014
+#define FLASH_NVWPAR	0x0000DFB0
+#define FLASH_NVAPR0	0x0000DFB8
+#define FLASH_NVAPR1	0x0000DFBC
 
 /* FLASH_CR0 register bits */
 
 #define FLASH_WMS		0x80000000
 #define FLASH_SUSP		0x40000000
-#define FLASH_WPG   	0x20000000
+#define FLASH_WPG		0x20000000
 #define FLASH_DWPG		0x10000000
 #define FLASH_SER		0x08000000
 #define FLASH_SPR		0x01000000
@@ -75,7 +76,7 @@ enum str7x_status_codes
 #define FLASH_BSYA1		0x00000004
 #define FLASH_BSYA0		0x00000002
 
-/* FLASH_CR1 regsiter bits */
+/* FLASH_CR1 register bits */
 
 #define FLASH_B1S		0x02000000
 #define FLASH_B0S		0x01000000
@@ -100,11 +101,10 @@ enum str7x_status_codes
 #define FLASH_ERER		0x00000002
 #define FLASH_ERR		0x00000001
 
-typedef struct str7x_mem_layout_s {
-	u32 sector_start;
-	u32 sector_size;
-	u32 sector_bit;
-} str7x_mem_layout_t;
+struct str7x_mem_layout {
+	uint32_t sector_start;
+	uint32_t sector_size;
+	uint32_t sector_bit;
+};
 
 #endif /* STR7X_H */
-