X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Fjtag%2Fdrivers%2Fbcm2835gpio.c;h=926bd89d338fb8e6e7dac6a21147eea769f78e89;hp=5af92c36375bf537a04ed34b2858224537a7e51a;hb=b61e454869c988e7fafc1c16982ccfec04415b51;hpb=45bafc5c99297d0feccb06a2e002f2aae821d268

diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c
index 5af92c3637..926bd89d33 100644
--- a/src/jtag/drivers/bcm2835gpio.c
+++ b/src/jtag/drivers/bcm2835gpio.c
@@ -16,9 +16,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -30,8 +28,11 @@
 
 #include <sys/mman.h>
 
-#define BCM2835_PERI_BASE	0x20000000
-#define BCM2835_GPIO_BASE	(BCM2835_PERI_BASE + 0x200000) /* GPIO controller */
+uint32_t bcm2835_peri_base = 0x20000000;
+#define BCM2835_GPIO_BASE	(bcm2835_peri_base + 0x200000) /* GPIO controller */
+
+#define BCM2835_PADS_GPIO_0_27		(bcm2835_peri_base + 0x100000)
+#define BCM2835_PADS_GPIO_0_27_OFFSET	(0x2c / 4)
 
 /* GPIO setup macros */
 #define MODE_GPIO(g) (*(pio_base+((g)/10))>>(((g)%10)*3) & 7)
@@ -48,9 +49,12 @@
 static int dev_mem_fd;
 static volatile uint32_t *pio_base;
 
-static int bcm2835gpio_read(void);
-static void bcm2835gpio_write(int tck, int tms, int tdi);
-static void bcm2835gpio_reset(int trst, int srst);
+static bb_value_t bcm2835gpio_read(void);
+static int bcm2835gpio_write(int tck, int tms, int tdi);
+static int bcm2835gpio_reset(int trst, int srst);
+
+static int bcm2835_swdio_read(void);
+static void bcm2835_swdio_drive(bool is_output);
 
 static int bcm2835gpio_init(void);
 static int bcm2835gpio_quit(void);
@@ -59,6 +63,8 @@ static struct bitbang_interface bcm2835gpio_bitbang = {
 	.read = bcm2835gpio_read,
 	.write = bcm2835gpio_write,
 	.reset = bcm2835gpio_reset,
+	.swdio_read = bcm2835_swdio_read,
+	.swdio_drive = bcm2835_swdio_drive,
 	.blink = NULL
 };
 
@@ -75,18 +81,22 @@ static int trst_gpio = -1;
 static int trst_gpio_mode;
 static int srst_gpio = -1;
 static int srst_gpio_mode;
+static int swclk_gpio = -1;
+static int swclk_gpio_mode;
+static int swdio_gpio = -1;
+static int swdio_gpio_mode;
 
 /* Transition delay coefficients */
 static int speed_coeff = 113714;
 static int speed_offset = 28;
 static unsigned int jtag_delay;
 
-static int bcm2835gpio_read(void)
+static bb_value_t bcm2835gpio_read(void)
 {
-	return !!(GPIO_LEV & 1<<tdo_gpio);
+	return (GPIO_LEV & 1<<tdo_gpio) ? BB_HIGH : BB_LOW;
 }
 
-static void bcm2835gpio_write(int tck, int tms, int tdi)
+static int bcm2835gpio_write(int tck, int tms, int tdi)
 {
 	uint32_t set = tck<<tck_gpio | tms<<tms_gpio | tdi<<tdi_gpio;
 	uint32_t clear = !tck<<tck_gpio | !tms<<tms_gpio | !tdi<<tdi_gpio;
@@ -96,10 +106,26 @@ static void bcm2835gpio_write(int tck, int tms, int tdi)
 
 	for (unsigned int i = 0; i < jtag_delay; i++)
 		asm volatile ("");
+
+	return ERROR_OK;
+}
+
+static int bcm2835gpio_swd_write(int tck, int tms, int tdi)
+{
+	uint32_t set = tck<<swclk_gpio | tdi<<swdio_gpio;
+	uint32_t clear = !tck<<swclk_gpio | !tdi<<swdio_gpio;
+
+	GPIO_SET = set;
+	GPIO_CLR = clear;
+
+	for (unsigned int i = 0; i < jtag_delay; i++)
+		asm volatile ("");
+
+	return ERROR_OK;
 }
 
 /* (1) assert or (0) deassert reset lines */
-static void bcm2835gpio_reset(int trst, int srst)
+static int bcm2835gpio_reset(int trst, int srst)
 {
 	uint32_t set = 0;
 	uint32_t clear = 0;
@@ -116,6 +142,21 @@ static void bcm2835gpio_reset(int trst, int srst)
 
 	GPIO_SET = set;
 	GPIO_CLR = clear;
+
+	return ERROR_OK;
+}
+
+static void bcm2835_swdio_drive(bool is_output)
+{
+	if (is_output)
+		OUT_GPIO(swdio_gpio);
+	else
+		INP_GPIO(swdio_gpio);
+}
+
+static int bcm2835_swdio_read(void)
+{
+	return !!(GPIO_LEV & 1 << swdio_gpio);
 }
 
 static int bcm2835gpio_khz(int khz, int *jtag_speed)
@@ -159,7 +200,7 @@ COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionums)
 	}
 
 	command_print(CMD_CTX,
-			"BCM2835 GPIO config: tck = %d, tms = %d, tdi = %d, tdi = %d",
+			"BCM2835 GPIO config: tck = %d, tms = %d, tdi = %d, tdo = %d",
 			tck_gpio, tms_gpio, tdi_gpio, tdo_gpio);
 
 	return ERROR_OK;
@@ -219,12 +260,59 @@ COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_trst)
 	return ERROR_OK;
 }
 
+COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionums)
+{
+	if (CMD_ARGC == 2) {
+		COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
+		COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], swdio_gpio);
+	} else if (CMD_ARGC != 0) {
+		return ERROR_COMMAND_SYNTAX_ERROR;
+	}
+
+	command_print(CMD_CTX,
+			"BCM2835 GPIO nums: swclk = %d, swdio = %d",
+			swclk_gpio, swdio_gpio);
+
+	return ERROR_OK;
+}
+
+COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swclk)
+{
+	if (CMD_ARGC == 1)
+		COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
+
+	command_print(CMD_CTX, "BCM2835 num: swclk = %d", swclk_gpio);
+	return ERROR_OK;
+}
+
+COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swdio)
+{
+	if (CMD_ARGC == 1)
+		COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_gpio);
+
+	command_print(CMD_CTX, "BCM2835 num: swdio = %d", swdio_gpio);
+	return ERROR_OK;
+}
+
 COMMAND_HANDLER(bcm2835gpio_handle_speed_coeffs)
 {
 	if (CMD_ARGC == 2) {
 		COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], speed_coeff);
 		COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], speed_offset);
 	}
+
+	command_print(CMD_CTX, "BCM2835 GPIO: speed_coeffs = %d, speed_offset = %d",
+				  speed_coeff, speed_offset);
+	return ERROR_OK;
+}
+
+COMMAND_HANDLER(bcm2835gpio_handle_peripheral_base)
+{
+	if (CMD_ARGC == 1)
+		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], bcm2835_peri_base);
+
+	command_print(CMD_CTX, "BCM2835 GPIO: peripheral_base = 0x%08x",
+				  bcm2835_peri_base);
 	return ERROR_OK;
 }
 
@@ -234,58 +322,97 @@ static const struct command_registration bcm2835gpio_command_handlers[] = {
 		.handler = &bcm2835gpio_handle_jtag_gpionums,
 		.mode = COMMAND_CONFIG,
 		.help = "gpio numbers for tck, tms, tdi, tdo. (in that order)",
-		.usage = "(tck tms tdi tdo)* ",
+		.usage = "[tck tms tdi tdo]",
 	},
 	{
 		.name = "bcm2835gpio_tck_num",
 		.handler = &bcm2835gpio_handle_jtag_gpionum_tck,
 		.mode = COMMAND_CONFIG,
 		.help = "gpio number for tck.",
+		.usage = "[tck]",
 	},
 	{
 		.name = "bcm2835gpio_tms_num",
 		.handler = &bcm2835gpio_handle_jtag_gpionum_tms,
 		.mode = COMMAND_CONFIG,
 		.help = "gpio number for tms.",
+		.usage = "[tms]",
 	},
 	{
 		.name = "bcm2835gpio_tdo_num",
 		.handler = &bcm2835gpio_handle_jtag_gpionum_tdo,
 		.mode = COMMAND_CONFIG,
 		.help = "gpio number for tdo.",
+		.usage = "[tdo]",
 	},
 	{
 		.name = "bcm2835gpio_tdi_num",
 		.handler = &bcm2835gpio_handle_jtag_gpionum_tdi,
 		.mode = COMMAND_CONFIG,
 		.help = "gpio number for tdi.",
+		.usage = "[tdi]",
+	},
+	{
+		.name = "bcm2835gpio_swd_nums",
+		.handler = &bcm2835gpio_handle_swd_gpionums,
+		.mode = COMMAND_CONFIG,
+		.help = "gpio numbers for swclk, swdio. (in that order)",
+		.usage = "[swclk swdio]",
+	},
+	{
+		.name = "bcm2835gpio_swclk_num",
+		.handler = &bcm2835gpio_handle_swd_gpionum_swclk,
+		.mode = COMMAND_CONFIG,
+		.help = "gpio number for swclk.",
+		.usage = "[swclk]",
+	},
+	{
+		.name = "bcm2835gpio_swdio_num",
+		.handler = &bcm2835gpio_handle_swd_gpionum_swdio,
+		.mode = COMMAND_CONFIG,
+		.help = "gpio number for swdio.",
+		.usage = "[swdio]",
 	},
 	{
 		.name = "bcm2835gpio_srst_num",
 		.handler = &bcm2835gpio_handle_jtag_gpionum_srst,
 		.mode = COMMAND_CONFIG,
 		.help = "gpio number for srst.",
+		.usage = "[srst]",
 	},
 	{
 		.name = "bcm2835gpio_trst_num",
 		.handler = &bcm2835gpio_handle_jtag_gpionum_trst,
 		.mode = COMMAND_CONFIG,
 		.help = "gpio number for trst.",
+		.usage = "[trst]",
 	},
 	{
 		.name = "bcm2835gpio_speed_coeffs",
 		.handler = &bcm2835gpio_handle_speed_coeffs,
 		.mode = COMMAND_CONFIG,
 		.help = "SPEED_COEFF and SPEED_OFFSET for delay calculations.",
+		.usage = "[SPEED_COEFF SPEED_OFFSET]",
 	},
+	{
+		.name = "bcm2835gpio_peripheral_base",
+		.handler = &bcm2835gpio_handle_peripheral_base,
+		.mode = COMMAND_CONFIG,
+		.help = "peripheral base to access GPIOs (RPi1 0x20000000, RPi2 0x3F000000).",
+		.usage = "[base]",
+	},
+
 	COMMAND_REGISTRATION_DONE
 };
 
+static const char * const bcm2835_transports[] = { "jtag", "swd", NULL };
+
 struct jtag_interface bcm2835gpio_interface = {
 	.name = "bcm2835gpio",
 	.supported = DEBUG_CAP_TMS_SEQ,
 	.execute_queue = bitbang_execute_queue,
-	.transports = jtag_only,
+	.transports = bcm2835_transports,
+	.swd = &bitbang_swd,
 	.speed = bcm2835gpio_speed,
 	.khz = bcm2835gpio_khz,
 	.speed_div = bcm2835gpio_speed_div,
@@ -294,15 +421,45 @@ struct jtag_interface bcm2835gpio_interface = {
 	.quit = bcm2835gpio_quit,
 };
 
+static bool bcm2835gpio_jtag_mode_possible(void)
+{
+	if (!is_gpio_valid(tck_gpio))
+		return 0;
+	if (!is_gpio_valid(tms_gpio))
+		return 0;
+	if (!is_gpio_valid(tdi_gpio))
+		return 0;
+	if (!is_gpio_valid(tdo_gpio))
+		return 0;
+	return 1;
+}
+
+static bool bcm2835gpio_swd_mode_possible(void)
+{
+	if (!is_gpio_valid(swclk_gpio))
+		return 0;
+	if (!is_gpio_valid(swdio_gpio))
+		return 0;
+	return 1;
+}
+
 static int bcm2835gpio_init(void)
 {
 	bitbang_interface = &bcm2835gpio_bitbang;
 
-	if (!is_gpio_valid(tdo_gpio) || !is_gpio_valid(tdi_gpio) ||
-		!is_gpio_valid(tck_gpio) || !is_gpio_valid(tms_gpio) ||
-		(trst_gpio != -1 && !is_gpio_valid(trst_gpio)) ||
-		(srst_gpio != -1 && !is_gpio_valid(srst_gpio)))
+	LOG_INFO("BCM2835 GPIO JTAG/SWD bitbang driver");
+
+	if (bcm2835gpio_jtag_mode_possible()) {
+		if (bcm2835gpio_swd_mode_possible())
+			LOG_INFO("JTAG and SWD modes enabled");
+		else
+			LOG_INFO("JTAG only mode enabled (specify swclk and swdio gpio to add SWD mode)");
+	} else if (bcm2835gpio_swd_mode_possible()) {
+		LOG_INFO("SWD only mode enabled (specify tck, tms, tdi and tdo gpios to add JTAG mode)");
+	} else {
+		LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode and/or swclk and swdio gpio for SWD mode");
 		return ERROR_JTAG_INIT_FAILED;
+	}
 
 	dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
 	if (dev_mem_fd < 0) {
@@ -319,22 +476,39 @@ static int bcm2835gpio_init(void)
 		return ERROR_JTAG_INIT_FAILED;
 	}
 
+	static volatile uint32_t *pads_base;
+	pads_base = mmap(NULL, sysconf(_SC_PAGE_SIZE), PROT_READ | PROT_WRITE,
+				MAP_SHARED, dev_mem_fd, BCM2835_PADS_GPIO_0_27);
+
+	if (pads_base == MAP_FAILED) {
+		perror("mmap");
+		close(dev_mem_fd);
+		return ERROR_JTAG_INIT_FAILED;
+	}
+
+	/* set 4mA drive strength, slew rate limited, hysteresis on */
+	pads_base[BCM2835_PADS_GPIO_0_27_OFFSET] = 0x5a000008 + 1;
+
 	tdo_gpio_mode = MODE_GPIO(tdo_gpio);
 	tdi_gpio_mode = MODE_GPIO(tdi_gpio);
 	tck_gpio_mode = MODE_GPIO(tck_gpio);
 	tms_gpio_mode = MODE_GPIO(tms_gpio);
+	swclk_gpio_mode = MODE_GPIO(swclk_gpio);
+	swdio_gpio_mode = MODE_GPIO(swdio_gpio);
 	/*
 	 * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
 	 * as outputs.  Drive TDI and TCK low, and TMS/TRST/SRST high.
 	 */
 	INP_GPIO(tdo_gpio);
 
-	GPIO_CLR = 1<<tdi_gpio | 1<<tck_gpio;
+	GPIO_CLR = 1<<tdi_gpio | 1<<tck_gpio | 1<<swdio_gpio | 1<<swclk_gpio;
 	GPIO_SET = 1<<tms_gpio;
 
 	OUT_GPIO(tdi_gpio);
 	OUT_GPIO(tck_gpio);
 	OUT_GPIO(tms_gpio);
+	OUT_GPIO(swclk_gpio);
+	OUT_GPIO(swdio_gpio);
 	if (trst_gpio != -1) {
 		trst_gpio_mode = MODE_GPIO(trst_gpio);
 		GPIO_SET = 1 << trst_gpio;
@@ -350,6 +524,11 @@ static int bcm2835gpio_init(void)
 		  "tdo %d trst %d srst %d", tck_gpio_mode, tms_gpio_mode,
 		  tdi_gpio_mode, tdo_gpio_mode, trst_gpio_mode, srst_gpio_mode);
 
+	if (swd_mode) {
+		bcm2835gpio_bitbang.write = bcm2835gpio_swd_write;
+		bitbang_switch_to_swd();
+	}
+
 	return ERROR_OK;
 }
 
@@ -359,6 +538,8 @@ static int bcm2835gpio_quit(void)
 	SET_MODE_GPIO(tdi_gpio, tdi_gpio_mode);
 	SET_MODE_GPIO(tck_gpio, tck_gpio_mode);
 	SET_MODE_GPIO(tms_gpio, tms_gpio_mode);
+	SET_MODE_GPIO(swclk_gpio, swclk_gpio_mode);
+	SET_MODE_GPIO(swdio_gpio, swdio_gpio_mode);
 	if (trst_gpio != -1)
 		SET_MODE_GPIO(trst_gpio, trst_gpio_mode);
 	if (srst_gpio != -1)