X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Frtos%2Fzephyr.c;h=a4c60904b5397d3b3e37776288c6b0ccf08688cf;hp=b594b2b531366f3f487d3a2f1e037e8745c3caec;hb=HEAD;hpb=a489058d7b1d7bab8d0e4db53f98b7762d7482a2

diff --git a/src/rtos/zephyr.c b/src/rtos/zephyr.c
index b594b2b531..a4c60904b5 100644
--- a/src/rtos/zephyr.c
+++ b/src/rtos/zephyr.c
@@ -1,11 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
 /***************************************************************************
  *   Copyright (C) 2017 by Intel Corporation
  *   Leandro Pereira <leandro.pereira@intel.com>
  *   Daniel Glöckner <dg@emlix.com>*
  *   Copyright (C) 2021 by Synopsys, Inc.
  *   Evgeniy Didin <didin@synopsys.com>
- *                                                                         *
- *   SPDX-License-Identifier: GPL-2.0-or-later                             *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -57,6 +57,7 @@ enum zephyr_offsets {
 	OFFSET_T_ARCH,
 	OFFSET_T_PREEMPT_FLOAT,
 	OFFSET_T_COOP_FLOAT,
+	OFFSET_T_ARM_EXC_RETURN,
 	OFFSET_MAX
 };
 
@@ -136,7 +137,7 @@ static const struct stack_register_offset arm_cpu_saved[] = {
 	{ ARMV7M_R13,  -2, 32 },
 	{ ARMV7M_R14,  20, 32 },
 	{ ARMV7M_PC,   24, 32 },
-	{ ARMV7M_xPSR, 28, 32 },
+	{ ARMV7M_XPSR, 28, 32 },
 };
 
 static struct stack_register_offset arc_cpu_saved[] = {
@@ -189,9 +190,9 @@ enum zephyr_symbol_values {
 	ZEPHYR_VAL_COUNT
 };
 
-static int64_t zephyr_cortex_m_stack_align(struct target *target,
+static target_addr_t zephyr_cortex_m_stack_align(struct target *target,
 		const uint8_t *stack_data,
-		const struct rtos_register_stacking *stacking, int64_t stack_ptr)
+		const struct rtos_register_stacking *stacking, target_addr_t stack_ptr)
 {
 	return rtos_cortex_m_stack_align(target, stack_data, stacking,
 			stack_ptr, ARM_XPSR_OFFSET);
@@ -340,6 +341,14 @@ static struct zephyr_params zephyr_params_list[] = {
 		.cpu_saved_fp_stacking = &arm_cpu_saved_fp_stacking,
 		.get_cpu_state = &zephyr_get_arm_state,
 	},
+	{
+		.target_name = "cortex_r4",
+		.pointer_width = 4,
+		.callee_saved_stacking = &arm_callee_saved_stacking,
+		.cpu_saved_nofp_stacking = &arm_cpu_saved_nofp_stacking,
+		.cpu_saved_fp_stacking = &arm_cpu_saved_fp_stacking,
+		.get_cpu_state = &zephyr_get_arm_state,
+	},
 	{
 		.target_name = "hla_target",
 		.pointer_width = 4,
@@ -367,15 +376,15 @@ static const struct symbol_table_elem zephyr_symbol_list[] = {
 		.optional = false
 	},
 	{
-		.symbol_name = "_kernel_openocd_offsets",
+		.symbol_name = "_kernel_thread_info_offsets",
 		.optional = false
 	},
 	{
-		.symbol_name = "_kernel_openocd_size_t_size",
+		.symbol_name = "_kernel_thread_info_size_t_size",
 		.optional = false
 	},
 	{
-		.symbol_name = "_kernel_openocd_num_offsets",
+		.symbol_name = "_kernel_thread_info_num_offsets",
 		.optional = true
 	},
 	{
@@ -385,7 +394,7 @@ static const struct symbol_table_elem zephyr_symbol_list[] = {
 
 static bool zephyr_detect_rtos(struct target *target)
 {
-	if (target->rtos->symbols == NULL) {
+	if (!target->rtos->symbols) {
 		LOG_INFO("Zephyr: no symbols while detecting RTOS");
 		return false;
 	}
@@ -745,14 +754,14 @@ static int zephyr_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
 
 	LOG_INFO("Getting thread %" PRId64 " reg list", thread_id);
 
-	if (rtos == NULL)
+	if (!rtos)
 		return ERROR_FAIL;
 
 	if (thread_id == 0)
 		return ERROR_FAIL;
 
 	params = rtos->rtos_specific_params;
-	if (params == NULL)
+	if (!params)
 		return ERROR_FAIL;
 
 	addr = thread_id + params->offsets[OFFSET_T_STACK_POINTER]
@@ -777,7 +786,7 @@ static int zephyr_get_symbol_list_to_lookup(struct symbol_table_elem **symbol_li
 	return ERROR_OK;
 }
 
-struct rtos_type zephyr_rtos = {
+const struct rtos_type zephyr_rtos = {
 	.name = "Zephyr",
 
 	.detect_rtos = zephyr_detect_rtos,