X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2FMakefile.am;h=49e882fe6c6a5e2c062525eb4fb75e0356b5796a;hp=19ba7714e1555a1320c7daad18724e74be4b4062;hb=HEAD;hpb=d7d70c2719e6fe94dc9ca15aeb81cf142d597cdc

diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index 19ba7714e1..1fc7d2afa6 100644
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -1,11 +1,9 @@
-if OOCD_TRACE
-OOCD_TRACE_FILES = %D%/oocd_trace.c
-else
-OOCD_TRACE_FILES =
-endif
+# SPDX-License-Identifier: GPL-2.0-or-later
 
 %C%_libtarget_la_LIBADD = %D%/openrisc/libopenrisc.la \
-	%D%/riscv/libriscv.la
+	%D%/riscv/libriscv.la \
+	%D%/xtensa/libxtensa.la \
+	%D%/espressif/libespressif.la
 
 %C%_libtarget_la_CPPFLAGS = $(AM_CPPFLAGS)
 
@@ -21,7 +19,6 @@ noinst_LTLIBRARIES += %D%/libtarget.la
 	$(ARM_MISC_SRC) \
 	$(AVR32_SRC) \
 	$(MIPS32_SRC) \
-	$(NDS32_SRC) \
 	$(STM8_SRC) \
 	$(INTEL_IA32_SRC) \
 	$(ESIRISC_SRC) \
@@ -48,7 +45,8 @@ TARGET_CORE_SRC = \
 	%D%/target_request.c \
 	%D%/testee.c \
 	%D%/semihosting_common.c \
-	%D%/smp.c
+	%D%/smp.c \
+	%D%/rtt.c
 
 ARMV4_5_SRC = \
 	%D%/armv4_5.c \
@@ -110,8 +108,8 @@ ARM_DEBUG_SRC = \
 	%D%/trace.c \
 	%D%/etb.c \
 	%D%/etm.c \
-	$(OOCD_TRACE_FILES) \
 	%D%/etm_dummy.c \
+	%D%/arm_tpiu_swo.c \
 	%D%/arm_cti.c
 
 AVR32_SRC = \
@@ -135,18 +133,6 @@ MIPS64_SRC = \
 	%D%/trace.c \
 	%D%/mips_ejtag.c
 
-NDS32_SRC = \
-	%D%/nds32.c \
-	%D%/nds32_reg.c \
-	%D%/nds32_cmd.c \
-	%D%/nds32_disassembler.c \
-	%D%/nds32_tlb.c \
-	%D%/nds32_v2.c \
-	%D%/nds32_v3_common.c \
-	%D%/nds32_v3.c \
-	%D%/nds32_v3m.c \
-	%D%/nds32_aice.c
-
 STM8_SRC = \
 	%D%/stm8.c
 
@@ -170,6 +156,7 @@ ARC_SRC = \
 %C%_libtarget_la_SOURCES += \
 	%D%/algorithm.h \
 	%D%/arm.h \
+	%D%/arm_coresight.h \
 	%D%/arm_dpm.h \
 	%D%/arm_jtag.h \
 	%D%/arm_adi_v5.h \
@@ -213,16 +200,17 @@ ARC_SRC = \
 	%D%/etb.h \
 	%D%/etm.h \
 	%D%/etm_dummy.h \
+	%D%/arm_tpiu_swo.h \
 	%D%/image.h \
 	%D%/mips32.h \
 	%D%/mips64.h \
+	%D%/mips_cpu.h \
 	%D%/mips_m4k.h \
 	%D%/mips_mips64.h \
 	%D%/mips_ejtag.h \
 	%D%/mips32_pracc.h \
 	%D%/mips32_dmaacc.h \
 	%D%/mips64_pracc.h \
-	%D%/oocd_trace.h \
 	%D%/register.h \
 	%D%/target.h \
 	%D%/target_type.h \
@@ -235,18 +223,6 @@ ARC_SRC = \
 	%D%/avr32_jtag.h \
 	%D%/avr32_mem.h \
 	%D%/avr32_regs.h \
-	%D%/nds32.h \
-	%D%/nds32_cmd.h \
-	%D%/nds32_disassembler.h \
-	%D%/nds32_edm.h \
-	%D%/nds32_insn.h \
-	%D%/nds32_reg.h \
-	%D%/nds32_tlb.h \
-	%D%/nds32_v2.h \
-	%D%/nds32_v3_common.h \
-	%D%/nds32_v3.h \
-	%D%/nds32_v3m.h \
-	%D%/nds32_aice.h \
 	%D%/semihosting_common.h \
 	%D%/stm8.h \
 	%D%/lakemont.h \
@@ -259,7 +235,10 @@ ARC_SRC = \
 	%D%/arc.h \
 	%D%/arc_cmd.h \
 	%D%/arc_jtag.h \
-	%D%/arc_mem.h
+	%D%/arc_mem.h \
+	%D%/rtt.h
 
 include %D%/openrisc/Makefile.am
 include %D%/riscv/Makefile.am
+include %D%/xtensa/Makefile.am
+include %D%/espressif/Makefile.am