X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm7_9_common.c;h=893c39dbd4918b779741e33886e71169f0a4c57d;hp=6a56417e26d1089e9c575331e6af775aed9b28db;hb=72b421418f315cb54a01ba4d249082f989d5154a;hpb=cfc4d5c6b7b6f8f82dc5bbf3ee661c179814666e diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index 6a56417e26..893c39dbd4 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -45,7 +45,7 @@ int arm7_9_debug_entry(target_t *target); * @param arm7_9 Pointer to the common struct for an ARM7/9 target * @return JTAG error status after executing queue */ -static int arm7_9_clear_watchpoints(arm7_9_common_t *arm7_9) +static int arm7_9_clear_watchpoints(struct arm7_9_common *arm7_9) { LOG_DEBUG("-"); embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], 0x0); @@ -66,7 +66,7 @@ static int arm7_9_clear_watchpoints(arm7_9_common_t *arm7_9) * @param arm7_9 Pointer to the common struct for an ARM7/9 target * @param breakpoint Pointer to the breakpoint to be used as a watchpoint */ -static void arm7_9_assign_wp(arm7_9_common_t *arm7_9, breakpoint_t *breakpoint) +static void arm7_9_assign_wp(struct arm7_9_common *arm7_9, breakpoint_t *breakpoint) { if (!arm7_9->wp0_used) { @@ -97,7 +97,7 @@ static void arm7_9_assign_wp(arm7_9_common_t *arm7_9, breakpoint_t *breakpoint) * @return Error codes if there is a problem finding a watchpoint or the result * of executing the JTAG queue */ -static int arm7_9_set_software_breakpoints(arm7_9_common_t *arm7_9) +static int arm7_9_set_software_breakpoints(struct arm7_9_common *arm7_9) { if (arm7_9->sw_breakpoints_added) { @@ -161,7 +161,7 @@ static int arm7_9_set_software_breakpoints(arm7_9_common_t *arm7_9) */ int arm7_9_setup(target_t *target) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); return arm7_9_clear_watchpoints(arm7_9); } @@ -178,9 +178,9 @@ int arm7_9_setup(target_t *target) * targets * @return ERROR_OK if successful */ -int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p) +int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, struct arm7_9_common **arm7_9_p) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; /* FIXME stop using this routine; just target_to_arm7_9() and @@ -212,7 +212,7 @@ int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm */ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); int retval = ERROR_OK; LOG_DEBUG("BPID: %d, Address: 0x%08" PRIx32 ", Type: %d" , @@ -342,7 +342,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { int retval = ERROR_OK; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); LOG_DEBUG("BPID: %d, Address: 0x%08" PRIx32, breakpoint->unique_id, @@ -436,7 +436,7 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) */ int arm7_9_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); if (target->state != TARGET_HALTED) { @@ -487,7 +487,7 @@ int arm7_9_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { int retval = ERROR_OK; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); if ((retval = arm7_9_unset_breakpoint(target, breakpoint)) != ERROR_OK) { @@ -520,10 +520,10 @@ int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint) * @return Error status if watchpoint set fails or the result of executing the * JTAG queue */ -int arm7_9_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int arm7_9_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint) { int retval = ERROR_OK; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); int rw_mask = 1; uint32_t mask; @@ -591,10 +591,10 @@ int arm7_9_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint) * @return Error status while trying to unset the watchpoint or the result of * executing the JTAG queue */ -int arm7_9_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int arm7_9_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoint) { int retval = ERROR_OK; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); if (target->state != TARGET_HALTED) { @@ -639,9 +639,9 @@ int arm7_9_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint) * @param watchpoint Pointer to the watchpoint to be added * @return Error status while trying to add the watchpoint */ -int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int arm7_9_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); if (target->state != TARGET_HALTED) { @@ -672,10 +672,10 @@ int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint) * @param watchpoint Pointer to the watchpoint to be removed * @return Result of trying to unset the watchpoint */ -int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int arm7_9_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint) { int retval = ERROR_OK; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); if (watchpoint->set) { @@ -702,8 +702,8 @@ int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint) int arm7_9_execute_sys_speed(struct target_s *target) { int retval; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; /* set RESTART instruction */ @@ -755,8 +755,8 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target) static int set = 0; static uint8_t check_value[4], check_mask[4]; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; /* set RESTART instruction */ @@ -796,8 +796,8 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target) */ int arm7_9_target_request_data(target_t *target, uint32_t size, uint8_t *buffer) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; uint32_t *data; int retval = ERROR_OK; uint32_t i; @@ -832,8 +832,8 @@ int arm7_9_handle_target_request(void *priv) target_t *target = priv; if (!target_was_examined(target)) return ERROR_OK; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; reg_t *dcc_control = &arm7_9->eice_cache->reg_list[EICE_COMMS_CTRL]; if (!target->dbg_msg_enabled) @@ -890,7 +890,7 @@ int arm7_9_handle_target_request(void *priv) int arm7_9_poll(target_t *target) { int retval; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; /* read debug status register */ @@ -982,7 +982,7 @@ int arm7_9_poll(target_t *target) */ int arm7_9_assert_reset(target_t *target) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); LOG_DEBUG("target->state: %s", target_state_name(target)); @@ -1114,7 +1114,7 @@ int arm7_9_deassert_reset(target_t *target) */ int arm7_9_clear_halt(target_t *target) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; /* we used DBGRQ only if we didn't come out of reset */ @@ -1171,7 +1171,7 @@ int arm7_9_clear_halt(target_t *target) */ int arm7_9_soft_reset_halt(struct target_s *target) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; @@ -1290,7 +1290,7 @@ int arm7_9_halt(target_t *target) return ERROR_OK; } - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; LOG_DEBUG("target->state: %s", @@ -1352,7 +1352,7 @@ int arm7_9_debug_entry(target_t *target) uint32_t r0_thumb, pc_thumb; uint32_t cpsr; int retval; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; @@ -1506,7 +1506,7 @@ int arm7_9_full_context(target_t *target) { int i; int retval; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; LOG_DEBUG("-"); @@ -1597,10 +1597,10 @@ int arm7_9_full_context(target_t *target) */ int arm7_9_restore_context(target_t *target) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; reg_t *reg; - armv4_5_core_reg_t *reg_arch_info; + struct armv4_5_core_reg *reg_arch_info; enum armv4_5_mode current_mode = armv4_5->core_mode; int i, j; int dirty; @@ -1747,8 +1747,8 @@ int arm7_9_restore_context(target_t *target) */ int arm7_9_restart_core(struct target_s *target) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; /* set RESTART instruction */ jtag_set_end_state(TAP_IDLE); @@ -1770,7 +1770,7 @@ int arm7_9_restart_core(struct target_s *target) */ void arm7_9_enable_watchpoints(struct target_s *target) { - watchpoint_t *watchpoint = target->watchpoints; + struct watchpoint *watchpoint = target->watchpoints; while (watchpoint) { @@ -1800,7 +1800,7 @@ void arm7_9_enable_breakpoints(struct target_s *target) int arm7_9_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; breakpoint_t *breakpoint = target->breakpoints; reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; @@ -1960,7 +1960,7 @@ int arm7_9_resume(struct target_s *target, int current, uint32_t address, int ha void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; uint32_t current_pc; current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32); @@ -1997,7 +1997,7 @@ void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc) void arm7_9_disable_eice_step(target_t *target) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK]); embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK]); @@ -2012,7 +2012,7 @@ void arm7_9_disable_eice_step(target_t *target) int arm7_9_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; breakpoint_t *breakpoint = NULL; int err, retval; @@ -2108,13 +2108,13 @@ int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mod uint32_t* reg_p[16]; uint32_t value; int retval; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; if (armv4_5_mode_to_number(armv4_5->core_mode)==-1) return ERROR_FAIL; - enum armv4_5_mode reg_mode = ((armv4_5_core_reg_t*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, num).arch_info)->mode; + enum armv4_5_mode reg_mode = ((struct armv4_5_core_reg*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, num).arch_info)->mode; if ((num < 0) || (num > 16)) return ERROR_INVALID_ARGUMENTS; @@ -2144,7 +2144,7 @@ int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mod /* read a program status register * if the register mode is MODE_ANY, we read the cpsr, otherwise a spsr */ - armv4_5_core_reg_t *arch_info = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, num).arch_info; + struct armv4_5_core_reg *arch_info = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, num).arch_info; int spsr = (arch_info->mode == ARMV4_5_MODE_ANY) ? 0 : 1; arm7_9->read_xpsr(target, &value, spsr); @@ -2172,13 +2172,13 @@ int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mod int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, uint32_t value) { uint32_t reg[16]; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; if (armv4_5_mode_to_number(armv4_5->core_mode)==-1) return ERROR_FAIL; - enum armv4_5_mode reg_mode = ((armv4_5_core_reg_t*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, num).arch_info)->mode; + enum armv4_5_mode reg_mode = ((struct armv4_5_core_reg*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, num).arch_info)->mode; if ((num < 0) || (num > 16)) return ERROR_INVALID_ARGUMENTS; @@ -2207,7 +2207,7 @@ int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mo /* write a program status register * if the register mode is MODE_ANY, we write the cpsr, otherwise a spsr */ - armv4_5_core_reg_t *arch_info = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, num).arch_info; + struct armv4_5_core_reg *arch_info = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, num).arch_info; int spsr = (arch_info->mode == ARMV4_5_MODE_ANY) ? 0 : 1; /* if we're writing the CPSR, mask the T bit */ @@ -2232,7 +2232,7 @@ int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mo int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; uint32_t reg[16]; uint32_t num_accesses = 0; @@ -2407,7 +2407,7 @@ int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size, int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; @@ -2594,7 +2594,7 @@ static uint8_t *dcc_buffer; static int arm7_9_dcc_completion(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info) { int retval = ERROR_OK; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); if ((retval = target_wait_state(target, TARGET_DEBUG_RUNNING, 500)) != ERROR_OK) return retval; @@ -2611,7 +2611,7 @@ static int arm7_9_dcc_completion(struct target_s *target, uint32_t exit_point, i embeddedice_reg_t *ice_reg = arm7_9->eice_cache->reg_list[EICE_COMMS_DATA].arch_info; uint8_t reg_addr = ice_reg->addr & 0x1f; - jtag_tap_t *tap; + struct jtag_tap *tap; tap = ice_reg->jtag_info->tap; embeddedice_write_dcc(tap, reg_addr, buffer, little, count-2); @@ -2654,12 +2654,12 @@ static const uint32_t dcc_code[] = 0xeafffff9 /* b w */ }; -int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info)); +int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info)); int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer) { int retval; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); int i; if (!arm7_9->dcc_downloads) @@ -2690,8 +2690,8 @@ int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, } } - armv4_5_algorithm_t armv4_5_info; - reg_param_t reg_params[1]; + struct armv4_5_algorithm armv4_5_info; + struct reg_param reg_params[1]; armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; armv4_5_info.core_mode = ARMV4_5_MODE_SVC; @@ -2724,8 +2724,8 @@ int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum) { working_area_t *crc_algorithm; - armv4_5_algorithm_t armv4_5_info; - reg_param_t reg_params[2]; + struct armv4_5_algorithm armv4_5_info; + struct reg_param reg_params[2]; int retval; static const uint32_t arm7_9_crc_code[] = { @@ -2808,8 +2808,8 @@ int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t c int arm7_9_blank_check_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank) { working_area_t *erase_check_algorithm; - reg_param_t reg_params[3]; - armv4_5_algorithm_t armv4_5_info; + struct reg_param reg_params[3]; + struct armv4_5_algorithm armv4_5_info; int retval; uint32_t i; @@ -2878,7 +2878,7 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_command) int retval; target_t *target = get_current_target(cmd_ctx); armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; + struct arm7_9_common *arm7_9; if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK) { @@ -2923,7 +2923,7 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_im8_command) int retval; target_t *target = get_current_target(cmd_ctx); armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; + struct arm7_9_common *arm7_9; if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK) { @@ -2964,7 +2964,7 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command) int num; target_t *target = get_current_target(cmd_ctx); armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; + struct arm7_9_common *arm7_9; if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK) { @@ -2995,7 +2995,7 @@ COMMAND_HANDLER(handle_arm7_9_dbgrq_command) { target_t *target = get_current_target(cmd_ctx); armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; + struct arm7_9_common *arm7_9; if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK) { @@ -3028,7 +3028,7 @@ COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command) { target_t *target = get_current_target(cmd_ctx); armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; + struct arm7_9_common *arm7_9; if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK) { @@ -3061,7 +3061,7 @@ COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command) { target_t *target = get_current_target(cmd_ctx); armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; + struct arm7_9_common *arm7_9; if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK) { @@ -3090,7 +3090,7 @@ COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command) return ERROR_OK; } -int arm7_9_init_arch_info(target_t *target, arm7_9_common_t *arm7_9) +int arm7_9_init_arch_info(target_t *target, struct arm7_9_common *arm7_9) { int retval = ERROR_OK; armv4_5_common_t *armv4_5 = &arm7_9->armv4_5_common;