X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm7_9_common.h;h=6f1b51f919bbf458230adc08cbb0e7bf9f1709c3;hp=d43eaa6d5a733b01eadee2b8eaa0a270e02bcbcb;hb=374127301ec1d72033b9d573b72c7abdfd61990d;hpb=66ee303456910f684244a20a0ac2e958d40b78cb diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h index d43eaa6d5a..6f1b51f919 100644 --- a/src/target/arm7_9_common.h +++ b/src/target/arm7_9_common.h @@ -26,10 +26,11 @@ * Free Software Foundation, Inc., * * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * ***************************************************************************/ + #ifndef ARM7_9_COMMON_H #define ARM7_9_COMMON_H -#include "armv4_5.h" +#include "arm.h" #include "arm_jtag.h" #define ARM7_9_COMMON_MAGIC 0x0a790a79 /**< */ @@ -37,9 +38,8 @@ /** * Structure for items that are common between both ARM7 and ARM9 targets. */ -struct arm7_9_common -{ - struct arm armv4_5_common; +struct arm7_9_common { + struct arm arm; uint32_t common_magic; struct arm_jtag jtag_info; /**< JTAG information for target */ @@ -71,16 +71,26 @@ struct arm7_9_common struct working_area *dcc_working_area; - int (*examine_debug_reason)(struct target *target); /**< Function for determining why debug state was entered */ + int (*examine_debug_reason)(struct target *target); + /**< Function for determining why debug state was entered */ + + void (*change_to_arm)(struct target *target, uint32_t *r0, uint32_t *pc); + /**< Function for changing from Thumb to ARM mode */ + + void (*read_core_regs)(struct target *target, uint32_t mask, uint32_t *core_regs[16]); + /**< Function for reading the core registers */ + + void (*read_core_regs_target_buffer)(struct target *target, uint32_t mask, + void *buffer, int size); + void (*read_xpsr)(struct target *target, uint32_t *xpsr, int spsr); + /**< Function for reading CPSR or SPSR */ - void (*change_to_arm)(struct target *target, uint32_t *r0, uint32_t *pc); /**< Function for changing from Thumb to ARM mode */ + void (*write_xpsr)(struct target *target, uint32_t xpsr, int spsr); + /**< Function for writing to CPSR or SPSR */ - void (*read_core_regs)(struct target *target, uint32_t mask, uint32_t *core_regs[16]); /**< Function for reading the core registers */ - void (*read_core_regs_target_buffer)(struct target *target, uint32_t mask, void *buffer, int size); - void (*read_xpsr)(struct target *target, uint32_t *xpsr, int spsr); /**< Function for reading CPSR or SPSR */ + void (*write_xpsr_im8)(struct target *target, uint8_t xpsr_im, int rot, int spsr); + /**< Function for writing an immediate value to CPSR or SPSR */ - void (*write_xpsr)(struct target *target, uint32_t xpsr, int spsr); /**< Function for writing to CPSR or SPSR */ - void (*write_xpsr_im8)(struct target *target, uint8_t xpsr_im, int rot, int spsr); /**< Function for writing an immediate value to CPSR or SPSR */ void (*write_core_regs)(struct target *target, uint32_t mask, uint32_t core_regs[16]); void (*load_word_regs)(struct target *target, uint32_t mask); @@ -91,28 +101,28 @@ struct arm7_9_common void (*store_hword_reg)(struct target *target, int num); void (*store_byte_reg)(struct target *target, int num); - void (*write_pc)(struct target *target, uint32_t pc); /**< Function for writing to the program counter */ + void (*write_pc)(struct target *target, uint32_t pc); + /**< Function for writing to the program counter */ + void (*branch_resume)(struct target *target); void (*branch_resume_thumb)(struct target *target); void (*enable_single_step)(struct target *target, uint32_t next_pc); void (*disable_single_step)(struct target *target); - void (*set_special_dbgrq)(struct target *target); /**< Function for setting DBGRQ if the normal way won't work */ - - void (*post_debug_entry)(struct target *target); /**< Callback function called after entering debug mode */ - - void (*pre_restore_context)(struct target *target); /**< Callback function called before restoring the processor context */ - void (*post_restore_context)(struct target *target); /**< Callback function called after restoring the processor context */ + void (*set_special_dbgrq)(struct target *target); + /**< Function for setting DBGRQ if the normal way won't work */ + int (*post_debug_entry)(struct target *target); + /**< Callback function called after entering debug mode */ + void (*pre_restore_context)(struct target *target); + /**< Callback function called before restoring the processor context */ }; -static inline struct arm7_9_common * -target_to_arm7_9(struct target *target) +static inline struct arm7_9_common *target_to_arm7_9(struct target *target) { - return container_of(target->arch_info, struct arm7_9_common, - armv4_5_common); + return container_of(target->arch_info, struct arm7_9_common, arm); } static inline bool is_arm7_9(struct arm7_9_common *arm7_9) @@ -126,7 +136,6 @@ int arm7_9_poll(struct target *target); int arm7_9_target_request_data(struct target *target, uint32_t size, uint8_t *buffer); -int arm7_9_setup(struct target *target); int arm7_9_assert_reset(struct target *target); int arm7_9_deassert_reset(struct target *target); int arm7_9_reset_request_halt(struct target *target); @@ -135,15 +144,20 @@ int arm7_9_soft_reset_halt(struct target *target); int arm7_9_prepare_reset_halt(struct target *target); int arm7_9_halt(struct target *target); -int arm7_9_full_context(struct target *target); -int arm7_9_restore_context(struct target *target); -int arm7_9_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution); -int arm7_9_step(struct target *target, int current, uint32_t address, int handle_breakpoints); -int arm7_9_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer); - -int arm7_9_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_prams, struct reg_param *reg_param, uint32_t entry_point, void *arch_info); +int arm7_9_resume(struct target *target, int current, uint32_t address, + int handle_breakpoints, int debug_execution); +int arm7_9_step(struct target *target, int current, uint32_t address, + int handle_breakpoints); +int arm7_9_read_memory(struct target *target, uint32_t address, + uint32_t size, uint32_t count, uint8_t *buffer); +int arm7_9_write_memory(struct target *target, uint32_t address, + uint32_t size, uint32_t count, const uint8_t *buffer); +int arm7_9_bulk_write_memory(struct target *target, uint32_t address, + uint32_t count, const uint8_t *buffer); + +int arm7_9_run_algorithm(struct target *target, int num_mem_params, + struct mem_param *mem_params, int num_reg_prams, + struct reg_param *reg_param, uint32_t entry_point, void *arch_info); int arm7_9_add_breakpoint(struct target *target, struct breakpoint *breakpoint); int arm7_9_remove_breakpoint(struct target *target, struct breakpoint *breakpoint); @@ -157,5 +171,6 @@ int arm7_9_execute_sys_speed(struct target *target); int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9); int arm7_9_examine(struct target *target); +int arm7_9_check_reset(struct target *target); #endif /* ARM7_9_COMMON_H */