X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm7tdmi.c;h=9dcb302d9c88d2b12e9cd6d4e9e410bd422b44f1;hp=4c7cce19ebd707990c3bb5a4e540a9a725017305;hb=c0e7ccbd87cf491b065bf18bbdb6a73b741c2698;hpb=5c2f920cc792d40f449cf596b5729671d0414fa1

diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 4c7cce19eb..9dcb302d9c 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -19,9 +19,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -32,6 +30,7 @@
 #include "target_type.h"
 #include "register.h"
 #include "arm_opcodes.h"
+#include "arm_semihosting.h"
 
 /*
  * For information about ARM7TDMI, see ARM DDI 0210C (r4p1)
@@ -66,7 +65,7 @@ static int arm7tdmi_examine_debug_reason(struct target *target)
 		retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1, TAP_DRPAUSE);
 		if (retval != ERROR_OK)
 			return retval;
-		retval = arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+		retval = arm_jtag_set_instr(arm7_9->jtag_info.tap, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
 		if (retval != ERROR_OK)
 			return retval;
 
@@ -95,12 +94,18 @@ static const int arm7tdmi_num_bits[] = {1, 32};
 
 static inline int arm7tdmi_clock_out_inner(struct arm_jtag *jtag_info, uint32_t out, int breakpoint)
 {
-	uint32_t values[2] = {breakpoint, flip_u32(out, 32)};
+	uint8_t bp = breakpoint ? 1 : 0;
+	uint8_t out_value[4];
+	buf_set_u32(out_value, 0, 32, flip_u32(out, 32));
 
-	jtag_add_dr_out(jtag_info->tap,
+	struct scan_field fields[2] = {
+			{ .num_bits = arm7tdmi_num_bits[0], .out_value = &bp },
+			{ .num_bits = arm7tdmi_num_bits[1], .out_value = out_value },
+	};
+
+	jtag_add_dr_scan(jtag_info->tap,
 			2,
-			arm7tdmi_num_bits,
-			values,
+			fields,
 			TAP_DRPAUSE);
 
 	jtag_add_runtest(0, TAP_DRPAUSE);
@@ -120,7 +125,7 @@ static inline int arm7tdmi_clock_out(struct arm_jtag *jtag_info,
 	retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE);
 	if (retval != ERROR_OK)
 		return retval;
-	retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+	retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
 	if (retval != ERROR_OK)
 		return retval;
 
@@ -136,7 +141,7 @@ static int arm7tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in)
 	retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE);
 	if (retval != ERROR_OK)
 		return retval;
-	retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+	retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
 	if (retval != ERROR_OK)
 		return retval;
 
@@ -181,7 +186,7 @@ static int arm7tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
 	retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE);
 	if (retval != ERROR_OK)
 		return retval;
-	retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+	retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
 	if (retval != ERROR_OK)
 		return retval;
 
@@ -611,7 +616,7 @@ static void arm7tdmi_build_reg_cache(struct target *target)
 int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target)
 {
 	arm7tdmi_build_reg_cache(target);
-
+	arm_semihosting_init(target);
 	return ERROR_OK;
 }
 
@@ -648,6 +653,7 @@ int arm7tdmi_init_arch_info(struct target *target,
 	arm7_9->enable_single_step = arm7_9_enable_eice_step;
 	arm7_9->disable_single_step = arm7_9_disable_eice_step;
 
+	arm7_9->write_memory = arm7_9_write_memory;
 	arm7_9->bulk_write_memory = arm7_9_bulk_write_memory;
 
 	arm7_9->post_debug_entry = NULL;