X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm920t.c;h=62dd3a147ec3ff418a50eaa14c48967e8ce5f109;hp=9fe8fc4f66fb5d3e2f8685b20207e0b50fcd121b;hb=0181296f61f11e4390e5a381906021db4ddd4bcd;hpb=42ef503d37b18d907da16d26e99167566d5aabd1 diff --git a/src/target/arm920t.c b/src/target/arm920t.c index 9fe8fc4f66..62dd3a147e 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -24,6 +24,7 @@ #include "arm920t.h" #include "time_support.h" #include "target_type.h" +#include "register.h" /* @@ -51,17 +52,17 @@ #define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z)) -static int arm920t_read_cp15_physical(target_t *target, +static int arm920t_read_cp15_physical(struct target *target, int reg_addr, uint32_t *value) { - struct arm920t_common_s *arm920t = target_to_arm920(target); - arm_jtag_t *jtag_info; - scan_field_t fields[4]; + struct arm920t_common *arm920t = target_to_arm920(target); + struct arm_jtag *jtag_info; + struct scan_field fields[4]; uint8_t access_type_buf = 1; uint8_t reg_addr_buf = reg_addr & 0x3f; uint8_t nr_w_buf = 0; - jtag_info = &arm920t->arm9tdmi_common.arm7_9_common.jtag_info; + jtag_info = &arm920t->arm7_9_common.jtag_info; jtag_set_end_state(TAP_IDLE); arm_jtag_scann(jtag_info, 0xf); @@ -103,18 +104,18 @@ static int arm920t_read_cp15_physical(target_t *target, return ERROR_OK; } -static int arm920t_write_cp15_physical(target_t *target, +static int arm920t_write_cp15_physical(struct target *target, int reg_addr, uint32_t value) { - struct arm920t_common_s *arm920t = target_to_arm920(target); - arm_jtag_t *jtag_info; - scan_field_t fields[4]; + struct arm920t_common *arm920t = target_to_arm920(target); + struct arm_jtag *jtag_info; + struct scan_field fields[4]; uint8_t access_type_buf = 1; uint8_t reg_addr_buf = reg_addr & 0x3f; uint8_t nr_w_buf = 1; uint8_t value_buf[4]; - jtag_info = &arm920t->arm9tdmi_common.arm7_9_common.jtag_info; + jtag_info = &arm920t->arm7_9_common.jtag_info; buf_set_u32(value_buf, 0, 32, value); @@ -151,19 +152,19 @@ static int arm920t_write_cp15_physical(target_t *target, return ERROR_OK; } -static int arm920t_execute_cp15(target_t *target, uint32_t cp15_opcode, +static int arm920t_execute_cp15(struct target *target, uint32_t cp15_opcode, uint32_t arm_opcode) { int retval; - struct arm920t_common_s *arm920t = target_to_arm920(target); - arm_jtag_t *jtag_info; - scan_field_t fields[4]; + struct arm920t_common *arm920t = target_to_arm920(target); + struct arm_jtag *jtag_info; + struct scan_field fields[4]; uint8_t access_type_buf = 0; /* interpreted access */ uint8_t reg_addr_buf = 0x0; uint8_t nr_w_buf = 0; uint8_t cp15_opcode_buf[4]; - jtag_info = &arm920t->arm9tdmi_common.arm7_9_common.jtag_info; + jtag_info = &arm920t->arm7_9_common.jtag_info; jtag_set_end_state(TAP_IDLE); arm_jtag_scann(jtag_info, 0xf); @@ -208,7 +209,7 @@ static int arm920t_execute_cp15(target_t *target, uint32_t cp15_opcode, return ERROR_OK; } -static int arm920t_read_cp15_interpreted(target_t *target, +static int arm920t_read_cp15_interpreted(struct target *target, uint32_t cp15_opcode, uint32_t address, uint32_t *value) { struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); @@ -253,7 +254,7 @@ static int arm920t_read_cp15_interpreted(target_t *target, } static -int arm920t_write_cp15_interpreted(target_t *target, +int arm920t_write_cp15_interpreted(struct target *target, uint32_t cp15_opcode, uint32_t value, uint32_t address) { uint32_t cp15c15 = 0x0; @@ -293,7 +294,7 @@ int arm920t_write_cp15_interpreted(target_t *target, } // EXPORTED to FA256 -uint32_t arm920t_get_ttb(target_t *target) +uint32_t arm920t_get_ttb(struct target *target) { int retval; uint32_t ttb = 0x0; @@ -305,7 +306,7 @@ uint32_t arm920t_get_ttb(target_t *target) } // EXPORTED to FA256 -void arm920t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache) +void arm920t_disable_mmu_caches(struct target *target, int mmu, int d_u_cache, int i_cache) { uint32_t cp15_control; @@ -326,7 +327,7 @@ void arm920t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_ } // EXPORTED to FA256 -void arm920t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache) +void arm920t_enable_mmu_caches(struct target *target, int mmu, int d_u_cache, int i_cache) { uint32_t cp15_control; @@ -347,10 +348,10 @@ void arm920t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_c } // EXPORTED to FA256 -void arm920t_post_debug_entry(target_t *target) +void arm920t_post_debug_entry(struct target *target) { uint32_t cp15c15; - struct arm920t_common_s *arm920t = target_to_arm920(target); + struct arm920t_common *arm920t = target_to_arm920(target); /* examine cp15 control reg */ arm920t_read_cp15_physical(target, 0x2, &arm920t->cp15_control_reg); @@ -391,10 +392,10 @@ void arm920t_post_debug_entry(target_t *target) } // EXPORTED to FA256 -void arm920t_pre_restore_context(target_t *target) +void arm920t_pre_restore_context(struct target *target) { uint32_t cp15c15; - struct arm920t_common_s *arm920t = target_to_arm920(target); + struct arm920t_common *arm920t = target_to_arm920(target); /* restore i/d fault status and address register */ arm920t_write_cp15_interpreted(target, 0xee050f10, arm920t->d_fsr, 0x0); @@ -415,8 +416,8 @@ void arm920t_pre_restore_context(target_t *target) static const char arm920_not[] = "target is not an ARM920"; -static int arm920t_verify_pointer(struct command_context_s *cmd_ctx, - struct arm920t_common_s *arm920t) +static int arm920t_verify_pointer(struct command_context *cmd_ctx, + struct arm920t_common *arm920t) { if (arm920t->common_magic != ARM920T_COMMON_MAGIC) { command_print(cmd_ctx, arm920_not); @@ -427,14 +428,14 @@ static int arm920t_verify_pointer(struct command_context_s *cmd_ctx, } /** Logs summary of ARM920 state for a halted target. */ -int arm920t_arch_state(struct target_s *target) +int arm920t_arch_state(struct target *target) { static const char *state[] = { "disabled", "enabled" }; - struct arm920t_common_s *arm920t = target_to_arm920(target); + struct arm920t_common *arm920t = target_to_arm920(target); struct armv4_5_common_s *armv4_5; if (arm920t->common_magic != ARM920T_COMMON_MAGIC) @@ -443,7 +444,7 @@ int arm920t_arch_state(struct target_s *target) return ERROR_TARGET_INVALID; } - armv4_5 = &arm920t->arm9tdmi_common.arm7_9_common.armv4_5_common; + armv4_5 = &arm920t->arm7_9_common.armv4_5_common; LOG_USER("target halted in %s state due to %s, current mode: %s\n" "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n" @@ -460,7 +461,7 @@ int arm920t_arch_state(struct target_s *target) return ERROR_OK; } -static int arm920_mmu(struct target_s *target, int *enabled) +static int arm920_mmu(struct target *target, int *enabled) { if (target->state != TARGET_HALTED) { LOG_ERROR("%s: target not halted", __func__); @@ -471,7 +472,7 @@ static int arm920_mmu(struct target_s *target, int *enabled) return ERROR_OK; } -static int arm920_virt2phys(struct target_s *target, +static int arm920_virt2phys(struct target *target, uint32_t virt, uint32_t *phys) { /** @todo Implement this! */ @@ -480,7 +481,7 @@ static int arm920_virt2phys(struct target_s *target, } /** Reads a buffer, in the specified word size, with current MMU settings. */ -int arm920t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +int arm920t_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { int retval; @@ -490,21 +491,21 @@ int arm920t_read_memory(struct target_s *target, uint32_t address, uint32_t size } -static int arm920t_read_phys_memory(struct target_s *target, +static int arm920t_read_phys_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - struct arm920t_common_s *arm920t = target_to_arm920(target); + struct arm920t_common *arm920t = target_to_arm920(target); return armv4_5_mmu_read_physical(target, &arm920t->armv4_5_mmu, address, size, count, buffer); } -static int arm920t_write_phys_memory(struct target_s *target, +static int arm920t_write_phys_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - struct arm920t_common_s *arm920t = target_to_arm920(target); + struct arm920t_common *arm920t = target_to_arm920(target); return armv4_5_mmu_write_physical(target, &arm920t->armv4_5_mmu, address, size, count, buffer); @@ -512,7 +513,7 @@ static int arm920t_write_phys_memory(struct target_s *target, /** Writes a buffer, in the specified word size, with current MMU settings. */ -int arm920t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +int arm920t_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { int retval; @@ -525,7 +526,7 @@ int arm920t_write_memory(struct target_s *target, uint32_t address, uint32_t siz */ if (((size == 4) || (size == 2)) && (count == 1)) { - struct arm920t_common_s *arm920t = target_to_arm920(target); + struct arm920t_common *arm920t = target_to_arm920(target); if (arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled) { @@ -549,13 +550,13 @@ int arm920t_write_memory(struct target_s *target, uint32_t address, uint32_t siz } // EXPORTED to FA256 -int arm920t_soft_reset_halt(struct target_s *target) +int arm920t_soft_reset_halt(struct target *target) { int retval = ERROR_OK; - struct arm920t_common_s *arm920t = target_to_arm920(target); - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct arm920t_common *arm920t = target_to_arm920(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; - reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; + struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; if ((retval = target_halt(target)) != ERROR_OK) { @@ -620,14 +621,12 @@ int arm920t_soft_reset_halt(struct target_s *target) return ERROR_OK; } -int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, struct jtag_tap *tap) +int arm920t_init_arch_info(struct target *target, struct arm920t_common *arm920t, struct jtag_tap *tap) { - arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common; - arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common; + struct arm7_9_common *arm7_9 = &arm920t->arm7_9_common; - /* initialize arm9tdmi specific info (including arm7_9 and armv4_5) - */ - arm9tdmi_init_arch_info(target, arm9tdmi, tap); + /* initialize arm7/arm9 specific info (including armv4_5) */ + arm9tdmi_init_arch_info(target, arm7_9, tap); arm920t->common_magic = ARM920T_COMMON_MAGIC; @@ -655,9 +654,9 @@ int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, struct j return ERROR_OK; } -static int arm920t_target_create(struct target_s *target, Jim_Interp *interp) +static int arm920t_target_create(struct target *target, Jim_Interp *interp) { - arm920t_common_t *arm920t = calloc(1,sizeof(arm920t_common_t)); + struct arm920t_common *arm920t = calloc(1,sizeof(struct arm920t_common)); return arm920t_init_arch_info(target, arm920t, target->tap); } @@ -665,9 +664,9 @@ static int arm920t_target_create(struct target_s *target, Jim_Interp *interp) COMMAND_HANDLER(arm920t_handle_read_cache_command) { int retval = ERROR_OK; - target_t *target = get_current_target(cmd_ctx); - struct arm920t_common_s *arm920t = target_to_arm920(target); - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct target *target = get_current_target(cmd_ctx); + struct arm920t_common *arm920t = target_to_arm920(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; uint32_t cp15c15; uint32_t cp15_ctrl, cp15_ctrl_saved; @@ -676,7 +675,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) uint32_t C15_C_D_Ind, C15_C_I_Ind; int i; FILE *output; - arm920t_cache_line_t d_cache[8][64], i_cache[8][64]; + struct arm920t_cache_line d_cache[8][64], i_cache[8][64]; int segment, index; retval = arm920t_verify_pointer(cmd_ctx, arm920t); @@ -911,9 +910,9 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) COMMAND_HANDLER(arm920t_handle_read_mmu_command) { int retval = ERROR_OK; - target_t *target = get_current_target(cmd_ctx); - struct arm920t_common_s *arm920t = target_to_arm920(target); - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct target *target = get_current_target(cmd_ctx); + struct arm920t_common *arm920t = target_to_arm920(target); + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; uint32_t cp15c15; uint32_t cp15_ctrl, cp15_ctrl_saved; @@ -922,7 +921,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) int i; FILE *output; uint32_t Dlockdown, Ilockdown; - arm920t_tlb_entry_t d_tlb[64], i_tlb[64]; + struct arm920t_tlb_entry d_tlb[64], i_tlb[64]; int victim; retval = arm920t_verify_pointer(cmd_ctx, arm920t); @@ -1194,8 +1193,8 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) COMMAND_HANDLER(arm920t_handle_cp15_command) { int retval; - target_t *target = get_current_target(cmd_ctx); - struct arm920t_common_s *arm920t = target_to_arm920(target); + struct target *target = get_current_target(cmd_ctx); + struct arm920t_common *arm920t = target_to_arm920(target); retval = arm920t_verify_pointer(cmd_ctx, arm920t); if (retval != ERROR_OK) @@ -1247,8 +1246,8 @@ COMMAND_HANDLER(arm920t_handle_cp15_command) COMMAND_HANDLER(arm920t_handle_cp15i_command) { int retval; - target_t *target = get_current_target(cmd_ctx); - struct arm920t_common_s *arm920t = target_to_arm920(target); + struct target *target = get_current_target(cmd_ctx); + struct arm920t_common *arm920t = target_to_arm920(target); retval = arm920t_verify_pointer(cmd_ctx, arm920t); if (retval != ERROR_OK) @@ -1314,8 +1313,8 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command) COMMAND_HANDLER(arm920t_handle_cache_info_command) { int retval; - target_t *target = get_current_target(cmd_ctx); - struct arm920t_common_s *arm920t = target_to_arm920(target); + struct target *target = get_current_target(cmd_ctx); + struct arm920t_common *arm920t = target_to_arm920(target); retval = arm920t_verify_pointer(cmd_ctx, arm920t); if (retval != ERROR_OK) @@ -1325,7 +1324,7 @@ COMMAND_HANDLER(arm920t_handle_cache_info_command) } -static int arm920t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) +static int arm920t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) { if (cpnum!=15) { @@ -1336,7 +1335,7 @@ static int arm920t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, return arm920t_read_cp15_interpreted(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), 0, value); } -static int arm920t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) +static int arm920t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) { if (cpnum!=15) { @@ -1348,10 +1347,10 @@ static int arm920t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, } /** Registers commands to access coprocessor, cache, and MMU resources. */ -int arm920t_register_commands(struct command_context_s *cmd_ctx) +int arm920t_register_commands(struct command_context *cmd_ctx) { int retval; - command_t *arm920t_cmd; + struct command *arm920t_cmd; retval = arm9tdmi_register_commands(cmd_ctx); @@ -1380,7 +1379,7 @@ int arm920t_register_commands(struct command_context_s *cmd_ctx) } /** Holds methods for ARM920 targets. */ -target_type_t arm920t_target = +struct target_type arm920t_target = { .name = "arm920t", @@ -1407,8 +1406,9 @@ target_type_t arm920t_target = .virt2phys = arm920_virt2phys, .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, + + .checksum_memory = arm_checksum_memory, + .blank_check_memory = arm_blank_check_memory, .run_algorithm = armv4_5_run_algorithm, @@ -1420,7 +1420,7 @@ target_type_t arm920t_target = .register_commands = arm920t_register_commands, .target_create = arm920t_target_create, .init_target = arm9tdmi_init_target, - .examine = arm9tdmi_examine, + .examine = arm7_9_examine, .mrc = arm920t_mrc, .mcr = arm920t_mcr, };