X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm9tdmi.c;h=3110f95ea0606a2bc1ab37656f315d39072ec936;hp=fac0c8db7254f210f404f35e0efd86fe647a561d;hb=b52fa7492cfaf079145222d31eb8a2c9c6108ac4;hpb=84df52f9ea78e2d71bde648a16b69d80404c6421 diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index fac0c8db72..3110f95ea0 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -31,65 +31,27 @@ #include "target_type.h" +/* + * NOTE: this holds code that's used with multiple ARM9 processors: + * - ARM9TDMI (ARMv4T) ... in ARM920, ARM922, and ARM940 cores + * - ARM9E-S (ARMv5TE) ... in ARM946, ARM966, and ARM968 cores + * - ARM9EJS (ARMv5TEJ) ... in ARM926 core + * + * In short, the file name is a misnomer ... it is NOT specific to + * that first generation ARM9 processor, or cores using it. + */ + #if 0 #define _DEBUG_INSTRUCTION_EXECUTION_ #endif -/* cli handling */ -int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); - -/* forward declarations */ -int arm9tdmi_target_create( struct target_s *target, Jim_Interp *interp ); - -int arm9tdmi_quit(void); - -target_type_t arm9tdmi_target = -{ - .name = "arm9tdmi", - - .poll = arm7_9_poll, - .arch_state = armv4_5_arch_state, - - .target_request_data = arm7_9_target_request_data, - - .halt = arm7_9_halt, - .resume = arm7_9_resume, - .step = arm7_9_step, - - .assert_reset = arm7_9_assert_reset, - .deassert_reset = arm7_9_deassert_reset, - .soft_reset_halt = arm7_9_soft_reset_halt, - - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, - - .read_memory = arm7_9_read_memory, - .write_memory = arm7_9_write_memory, - .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, - - .run_algorithm = armv4_5_run_algorithm, - - .add_breakpoint = arm7_9_add_breakpoint, - .remove_breakpoint = arm7_9_remove_breakpoint, - .add_watchpoint = arm7_9_add_watchpoint, - .remove_watchpoint = arm7_9_remove_watchpoint, - - .register_commands = arm9tdmi_register_commands, - .target_create = arm9tdmi_target_create, - .init_target = arm9tdmi_init_target, - .examine = arm9tdmi_examine, - .quit = arm9tdmi_quit -}; - -arm9tdmi_vector_t arm9tdmi_vectors[] = +static const arm9tdmi_vector_t arm9tdmi_vectors[] = { {"reset", ARM9TDMI_RESET_VECTOR}, {"undef", ARM9TDMI_UNDEF_VECTOR}, {"swi", ARM9TDMI_SWI_VECTOR}, {"pabt", ARM9TDMI_PABT_VECTOR}, {"dabt", ARM9TDMI_DABT_VECTOR}, - {"reserved", ARM9TDMI_RESERVED_VECTOR}, {"irq", ARM9TDMI_IRQ_VECTOR}, {"fiq", ARM9TDMI_FIQ_VECTOR}, {0, 0}, @@ -161,8 +123,11 @@ int arm9tdmi_examine_debug_reason(target_t *target) return ERROR_OK; } -/* put an instruction in the ARM9TDMI pipeline or write the data bus, and optionally read data */ -int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, uint32_t out, uint32_t *in, int sysspeed) +/* put an instruction in the ARM9TDMI pipeline or write the data bus, + * and optionally read data + */ +int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, + uint32_t out, uint32_t *in, int sysspeed) { int retval = ERROR_OK; scan_field_t fields[3]; @@ -292,9 +257,12 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in) extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip); -static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured) +static int arm9endianness(jtag_callback_data_t arg, + jtag_callback_data_t size, jtag_callback_data_t be, + jtag_callback_data_t captured) { - uint8_t *in = (uint8_t *)arg; + uint8_t *in = (uint8_t *)arg; + arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0); return ERROR_OK; } @@ -303,7 +271,8 @@ static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, j * the *in pointer points to a buffer where elements of 'size' bytes * are stored in big (be == 1) or little (be == 0) endianness */ -int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be) +int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, + void *in, int size, int be) { int retval = ERROR_OK; scan_field_t fields[3]; @@ -358,7 +327,8 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, return ERROR_OK; } -void arm9tdmi_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) +static void arm9tdmi_change_to_arm(target_t *target, + uint32_t *r0, uint32_t *pc) { int retval = ERROR_OK; /* get pointers to arch-specific information */ @@ -413,7 +383,8 @@ void arm9tdmi_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) *pc -= 0xc; } -void arm9tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16]) +void arm9tdmi_read_core_regs(target_t *target, + uint32_t mask, uint32_t* core_regs[16]) { int i; /* get pointers to arch-specific information */ @@ -439,7 +410,8 @@ void arm9tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_reg } } -void arm9tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size) +static void arm9tdmi_read_core_regs_target_buffer(target_t *target, + uint32_t mask, void* buffer, int size) { int i; /* get pointers to arch-specific information */ @@ -480,7 +452,7 @@ void arm9tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void } } -void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) +static void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -504,7 +476,7 @@ void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0); } -void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr) +static void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -540,7 +512,8 @@ void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void arm9tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr) +static void arm9tdmi_write_xpsr_im8(target_t *target, + uint8_t xpsr_im, int rot, int spsr) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -566,7 +539,8 @@ void arm9tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int sps } } -void arm9tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16]) +void arm9tdmi_write_core_regs(target_t *target, + uint32_t mask, uint32_t core_regs[16]) { int i; /* get pointers to arch-specific information */ @@ -587,7 +561,7 @@ void arm9tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_reg for (i = 0; i <= 15; i++) { if (mask & (1 << i)) - /* nothing fetched, LDM still in EXECUTE (1+i cycle) */ + /* nothing fetched, LDM still in EXECUTE (1 + i cycle) */ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, core_regs[i], NULL, 0); } arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); @@ -665,7 +639,7 @@ void arm9tdmi_store_byte_reg(target_t *target, int num) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); } -void arm9tdmi_write_pc(target_t *target, uint32_t pc) +static void arm9tdmi_write_pc(target_t *target, uint32_t pc) { /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -702,7 +676,7 @@ void arm9tdmi_branch_resume(target_t *target) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); } -void arm9tdmi_branch_resume_thumb(target_t *target) +static void arm9tdmi_branch_resume_thumb(target_t *target) { LOG_DEBUG("-"); @@ -796,7 +770,7 @@ void arm9tdmi_disable_single_step(target_t *target) } } -void arm9tdmi_build_reg_cache(target_t *target) +static void arm9tdmi_build_reg_cache(target_t *target) { reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); /* get pointers to arch-specific information */ @@ -843,16 +817,10 @@ int arm9tdmi_examine(struct target_s *target) return ERROR_OK; } -int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target) +int arm9tdmi_init_target(struct command_context_s *cmd_ctx, + struct target_s *target) { - arm9tdmi_build_reg_cache(target); - - return ERROR_OK; -} - -int arm9tdmi_quit(void) -{ return ERROR_OK; } @@ -894,7 +862,6 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_ arm7_9->enable_single_step = arm9tdmi_enable_single_step; arm7_9->disable_single_step = arm9tdmi_disable_single_step; - arm7_9->pre_debug_entry = NULL; arm7_9->post_debug_entry = NULL; arm7_9->pre_restore_context = NULL; @@ -921,7 +888,9 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_ return ERROR_OK; } -int arm9tdmi_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p) +static int arm9tdmi_get_arch_pointers(target_t *target, + armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, + arm9tdmi_common_t **arm9tdmi_p) { armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9; @@ -951,28 +920,18 @@ int arm9tdmi_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, a return ERROR_OK; } -int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp) +static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp) { arm9tdmi_common_t *arm9tdmi = calloc(1,sizeof(arm9tdmi_common_t)); arm9tdmi_init_arch_info(target, arm9tdmi, target->tap); + arm9tdmi->arm7_9_common.armv4_5_common.is_armv4 = true; return ERROR_OK; } -int arm9tdmi_register_commands(struct command_context_s *cmd_ctx) -{ - int retval; - command_t *arm9tdmi_cmd; - - retval = arm7_9_register_commands(cmd_ctx); - arm9tdmi_cmd = register_command(cmd_ctx, NULL, "arm9tdmi", NULL, COMMAND_ANY, "arm9tdmi specific commands"); - register_command(cmd_ctx, arm9tdmi_cmd, "vector_catch", handle_arm9tdmi_catch_vectors_command, COMMAND_EXEC, "catch arm920t vectors ['all'|'none'|'']"); - - return retval; -} - -int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_arm9tdmi_catch_vectors_command( + struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx); armv4_5_common_t *armv4_5; @@ -984,7 +943,7 @@ int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, cha if (arm9tdmi_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi) != ERROR_OK) { - command_print(cmd_ctx, "current target isn't an ARM9TDMI based target"); + command_print(cmd_ctx, "current target isn't an ARM9 based target"); return ERROR_OK; } @@ -995,7 +954,7 @@ int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, cha embeddedice_read_reg(vector_catch); /* get the current setting */ - vector_catch_value = buf_get_u32(vector_catch->value, 0, 32); + vector_catch_value = buf_get_u32(vector_catch->value, 0, 8); if (argc > 0) { @@ -1028,7 +987,9 @@ int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, cha command_print(cmd_ctx, "vector '%s' not found, leaving current setting unchanged", args[i]); /* reread current setting */ - vector_catch_value = buf_get_u32(vector_catch->value, 0, 32); + vector_catch_value = buf_get_u32( + vector_catch->value, + 0, 8); break; } @@ -1036,19 +997,71 @@ int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, cha } /* store new settings */ - buf_set_u32(vector_catch->value, 0, 32, vector_catch_value); + buf_set_u32(vector_catch->value, 0, 8, vector_catch_value); embeddedice_store_reg(vector_catch); } - /* output current settings (skip RESERVED vector) */ - for (i = 0; i < 8; i++) - { - if (i != 5) - { - command_print(cmd_ctx, "%s: %s", arm9tdmi_vectors[i].name, - (vector_catch_value & (1 << i)) ? "catch" : "don't catch"); - } + /* output current settings */ + for (i = 0; arm9tdmi_vectors[i].name; i++) { + command_print(cmd_ctx, "%s: %s", arm9tdmi_vectors[i].name, + (vector_catch_value & arm9tdmi_vectors[i].value) + ? "catch" : "don't catch"); } return ERROR_OK; } + +int arm9tdmi_register_commands(struct command_context_s *cmd_ctx) +{ + int retval; + command_t *arm9tdmi_cmd; + + retval = arm7_9_register_commands(cmd_ctx); + arm9tdmi_cmd = register_command(cmd_ctx, NULL, "arm9", + NULL, COMMAND_ANY, + "arm9 specific commands"); + register_command(cmd_ctx, arm9tdmi_cmd, "vector_catch", + handle_arm9tdmi_catch_vectors_command, COMMAND_EXEC, + "arm9 vector_catch [all|none|reset|undef|swi|pabt|dabt|irq|fiq] ..."); + + return retval; +} + +/** Holds methods for ARM9TDMI targets. */ +target_type_t arm9tdmi_target = +{ + .name = "arm9tdmi", + + .poll = arm7_9_poll, + .arch_state = armv4_5_arch_state, + + .target_request_data = arm7_9_target_request_data, + + .halt = arm7_9_halt, + .resume = arm7_9_resume, + .step = arm7_9_step, + + .assert_reset = arm7_9_assert_reset, + .deassert_reset = arm7_9_deassert_reset, + .soft_reset_halt = arm7_9_soft_reset_halt, + + .get_gdb_reg_list = armv4_5_get_gdb_reg_list, + + .read_memory = arm7_9_read_memory, + .write_memory = arm7_9_write_memory, + .bulk_write_memory = arm7_9_bulk_write_memory, + .checksum_memory = arm7_9_checksum_memory, + .blank_check_memory = arm7_9_blank_check_memory, + + .run_algorithm = armv4_5_run_algorithm, + + .add_breakpoint = arm7_9_add_breakpoint, + .remove_breakpoint = arm7_9_remove_breakpoint, + .add_watchpoint = arm7_9_add_watchpoint, + .remove_watchpoint = arm7_9_remove_watchpoint, + + .register_commands = arm9tdmi_register_commands, + .target_create = arm9tdmi_target_create, + .init_target = arm9tdmi_init_target, + .examine = arm9tdmi_examine, +};