X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm_adi_v5.h;h=27a2f2f8a907b7e836f5b669b1d33f4d8ee21b16;hp=d207fd9cd54d001a9eca26223c8c45f180b45716;hb=0649fb2f6c7e1bea138769ecc2ec8dc17ae98044;hpb=d33a81c549743e13633db9e8749f0e7cb0f7324b

diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index d207fd9cd5..27a2f2f8a9 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -32,15 +32,11 @@
 
 #include "arm_jtag.h"
 
-/* JTAG instructions/registers for JTAG-DP and SWJ-DP */
-#define JTAG_DP_ABORT		0x8
+/* FIXME remove these JTAG-specific decls when mem_ap_read_buf_u32()
+ * is no longer JTAG-specific
+ */
 #define JTAG_DP_DPACC		0xA
 #define JTAG_DP_APACC		0xB
-#define JTAG_DP_IDCODE		0xE
-
-/* three-bit ACK values for DPACC and APACC reads */
-#define JTAG_ACK_OK_FAULT	0x2
-#define JTAG_ACK_WAIT		0x1
 
 /* three-bit ACK values for SWD access (sent LSB first) */
 #define SWD_ACK_OK		0x4
@@ -182,7 +178,6 @@ struct adiv5_dap
 	uint32_t	memaccess_tck;
 	/* Size of TAR autoincrement block, ARM ADI Specification requires at least 10 bits */
 	uint32_t tar_autoincr_block;
-
 };
 
 /**
@@ -236,6 +231,7 @@ struct dap_ops {
 static inline int dap_queue_idcode_read(struct adiv5_dap *dap,
 		uint8_t *ack, uint32_t *data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_idcode_read(dap, ack, data);
 }
 
@@ -254,6 +250,7 @@ static inline int dap_queue_idcode_read(struct adiv5_dap *dap,
 static inline int dap_queue_dp_read(struct adiv5_dap *dap,
 		unsigned reg, uint32_t *data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_dp_read(dap, reg, data);
 }
 
@@ -271,6 +268,7 @@ static inline int dap_queue_dp_read(struct adiv5_dap *dap,
 static inline int dap_queue_dp_write(struct adiv5_dap *dap,
 		unsigned reg, uint32_t data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_dp_write(dap, reg, data);
 }
 
@@ -287,6 +285,7 @@ static inline int dap_queue_dp_write(struct adiv5_dap *dap,
 static inline int dap_queue_ap_read(struct adiv5_dap *dap,
 		unsigned reg, uint32_t *data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_ap_read(dap, reg, data);
 }
 
@@ -302,6 +301,7 @@ static inline int dap_queue_ap_read(struct adiv5_dap *dap,
 static inline int dap_queue_ap_write(struct adiv5_dap *dap,
 		unsigned reg, uint32_t data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_ap_write(dap, reg, data);
 }
 
@@ -318,6 +318,7 @@ static inline int dap_queue_ap_write(struct adiv5_dap *dap,
  */
 static inline int dap_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_ap_abort(dap, ack);
 }
 
@@ -333,6 +334,7 @@ static inline int dap_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
  */
 static inline int dap_run(struct adiv5_dap *dap)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->run(dap);
 }
 
@@ -377,6 +379,9 @@ int mem_ap_write_buf_u32(struct adiv5_dap *swjdp,
 /* Initialisation of the debug system, power domains and registers */
 int ahbap_debugport_init(struct adiv5_dap *swjdp);
 
+/* Probe the AP for ROM Table location */
+int dap_get_debugbase(struct adiv5_dap *dap, int apsel,
+			uint32_t *dbgbase, uint32_t *apid);
 
 struct target;