X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv4_5.c;h=10f84d81248f1369e8badd3f9f0c40a723c78b53;hp=7ba2debb98c3b360da1af61bc6eb2437ae31d7b6;hb=08d4411b59dd8bd0e7d8009003b71d23acbf6eee;hpb=a72a42230be9a479dd93687d99d39b9029acb50a

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 7ba2debb98..10f84d8124 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -21,7 +21,7 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -140,6 +140,21 @@ static const struct {
 		.n_indices = ARRAY_SIZE(arm_mon_indices),
 		.indices = arm_mon_indices,
 	},
+
+	/* These special modes are currently only supported
+	 * by ARMv6M and ARMv7M profiles */
+	{
+		.name = "Thread",
+		.psr = ARM_MODE_THREAD,
+	},
+	{
+		.name = "Thread (User)",
+		.psr = ARM_MODE_USER_THREAD,
+	},
+	{
+		.name = "Handler",
+		.psr = ARM_MODE_HANDLER,
+	},
 };
 
 /** Map PSR mode bits to the name of an ARM processor operating mode. */