X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv4_5.c;h=2528f1072cfc875996b905b4104c745de9772248;hp=3eab03354bc6ceb3386f5a74d4aad0ef9fe1a27f;hb=da767f48da13464b6bd03b08270b529273c995f4;hpb=e9297b40b994f071474210e7d9e224d50e25fcaf

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 3eab03354b..2528f1072c 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -174,14 +174,14 @@ int armv4_5_mode_to_number(enum armv4_5_mode mode)
 {
 	switch (mode)
 	{
-		case 16: return 0; break;
-		case 17: return 1; break;
-		case 18: return 2; break;
-		case 19: return 3; break;
-		case 23: return 4; break;
-		case 27: return 5; break;
-		case 31: return 6; break;
-		case -1: return 0; break;	/* map MODE_ANY to user mode */
+		case ARMV4_5_MODE_USR: return 0; break;
+		case ARMV4_5_MODE_FIQ: return 1; break;
+		case ARMV4_5_MODE_IRQ: return 2; break;
+		case ARMV4_5_MODE_SVC: return 3; break;
+		case ARMV4_5_MODE_ABT: return 4; break;
+		case ARMV4_5_MODE_UND: return 5; break;
+		case ARMV4_5_MODE_SYS: return 6; break;
+		case ARMV4_5_MODE_ANY: return 0; break;	/* map MODE_ANY to user mode */
 		default: 
 			ERROR("invalid mode value encountered");
 			return -1;
@@ -257,6 +257,13 @@ int armv4_5_set_core_reg(reg_t *reg, u8 *buf)
 				armv4_5_target->core_state = ARMV4_5_STATE_ARM;	
 			}
 		}
+		
+		if (armv4_5_target->core_mode != (value & 0x1f))
+		{
+			DEBUG("changing ARM core mode to '%s'", armv4_5_mode_strings[armv4_5_mode_to_number(value & 0x1f)]);
+			armv4_5_target->core_mode = value & 0x1f;
+			armv4_5_target->write_core_reg(target, 16, ARMV4_5_MODE_ANY, value);
+		}
 	}
 	
 	buf_set_u32(reg->value, 0, 32, value);
@@ -315,7 +322,7 @@ reg_cache_t* armv4_5_build_reg_cache(target_t *target, armv4_5_common_t *armv4_5
 	return cache;
 }
 
-int armv4_5_arch_state(struct target_s *target, char *buf, int buf_size)
+int armv4_5_arch_state(struct target_s *target)
 {
 	armv4_5_common_t *armv4_5 = target->arch_info;
 	
@@ -325,8 +332,7 @@ int armv4_5_arch_state(struct target_s *target, char *buf, int buf_size)
 		exit(-1);
 	}
 	
-	snprintf(buf, buf_size,
-			 "target halted in %s state due to %s, current mode: %s\ncpsr: 0x%8.8x pc: 0x%8.8x",
+	USER("target halted in %s state due to %s, current mode: %s\ncpsr: 0x%8.8x pc: 0x%8.8x",
 			 armv4_5_state_strings[armv4_5->core_state],
 			 target_debug_reason_strings[target->debug_reason],
 			 armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
@@ -442,7 +448,7 @@ int handle_armv4_5_disassemble_command(struct command_context_s *cmd_ctx, char *
 	for (i = 0; i < count; i++)
 	{
 		target_read_u32(target, address, &opcode);
-		evaluate_opcode(opcode, address, &cur_instruction);
+		arm_evaluate_opcode(opcode, address, &cur_instruction);
 		command_print(cmd_ctx, "%s", cur_instruction.text);
 		address += (thumb) ? 2 : 4;
 	}
@@ -598,6 +604,13 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
 		}
 	}
 	
+	if ((retval != ERROR_TARGET_TIMEOUT) && 
+		(buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) != exit_point))
+	{
+		WARNING("target reentered debug state, but not at the desired exit point: 0x%4.4x",
+			buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32)); 
+	}
+	
 	breakpoint_remove(target, exit_point);
 	
 	for (i = 0; i < num_mem_params; i++)