X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv7a.c;h=fe87fee45496fd78212e391ead900b2e340480ee;hp=42f1c770406dc19415b992c33d4cf7fadc369962;hb=4960c9018f2560b11ede91cde8a68dc56c690159;hpb=6f7491c1c10844e9e65482980a04182a3547bf4e diff --git a/src/target/armv7a.c b/src/target/armv7a.c index 42f1c77040..fe87fee454 100644 --- a/src/target/armv7a.c +++ b/src/target/armv7a.c @@ -20,282 +20,213 @@ #include "config.h" #endif -#include "replacements.h" +#include #include "armv7a.h" +#include "arm_disassembler.h" -#include "target.h" #include "register.h" -#include "log.h" -#include "binarybuffer.h" -#include "command.h" +#include +#include #include #include #include -bitfield_desc_t armv7a_psr_bitfield_desc[] = -{ - {"M[4:0]", 5}, - {"T", 1}, - {"F", 1}, - {"I", 1}, - {"A", 1}, - {"E", 1}, - {"IT[7:2]", 6}, - {"GE[3:0]", 4}, - {"reserved(DNM)", 4}, - {"J", 1}, - {"IT[0:1]", 2}, - {"Q", 1}, - {"V", 1}, - {"C", 1}, - {"Z", 1}, - {"N", 1}, -}; - -char* armv7a_core_reg_list[] = -{ - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13_usr", "lr_usr", "pc", - "r8_fiq", "r9_fiq", "r10_fiq", "r11_fiq", "r12_fiq", "r13_fiq", "lr_fiq", - "r13_irq", "lr_irq", - "r13_svc", "lr_svc", - "r13_abt", "lr_abt", - "r13_und", "lr_und", - "cpsr", "spsr_fiq", "spsr_irq", "spsr_svc", "spsr_abt", "spsr_und", - "r13_mon", "lr_mon", "spsr_mon" -}; - -char * armv7a_mode_strings_list[] = -{ - "Illegal mode value", "System and User", "FIQ", "IRQ", - "Supervisor", "Abort", "Undefined", "Monitor" -}; - -/* Hack! Yuk! allow -1 index, which simplifies codepaths elsewhere in the code */ -char** armv7a_mode_strings = armv7a_mode_strings_list+1; - -char* armv7a_state_strings[] = -{ - "ARM", "Thumb", "Jazelle", "ThumbEE" -}; - -armv7a_core_reg_t armv7a_core_reg_list_arch_info[] = -{ - {0, ARMV4_5_MODE_ANY, NULL, NULL}, - {1, ARMV4_5_MODE_ANY, NULL, NULL}, - {2, ARMV4_5_MODE_ANY, NULL, NULL}, - {3, ARMV4_5_MODE_ANY, NULL, NULL}, - {4, ARMV4_5_MODE_ANY, NULL, NULL}, - {5, ARMV4_5_MODE_ANY, NULL, NULL}, - {6, ARMV4_5_MODE_ANY, NULL, NULL}, - {7, ARMV4_5_MODE_ANY, NULL, NULL}, - {8, ARMV4_5_MODE_ANY, NULL, NULL}, - {9, ARMV4_5_MODE_ANY, NULL, NULL}, - {10, ARMV4_5_MODE_ANY, NULL, NULL}, - {11, ARMV4_5_MODE_ANY, NULL, NULL}, - {12, ARMV4_5_MODE_ANY, NULL, NULL}, - {13, ARMV4_5_MODE_USR, NULL, NULL}, - {14, ARMV4_5_MODE_USR, NULL, NULL}, - {15, ARMV4_5_MODE_ANY, NULL, NULL}, - - {8, ARMV4_5_MODE_FIQ, NULL, NULL}, - {9, ARMV4_5_MODE_FIQ, NULL, NULL}, - {10, ARMV4_5_MODE_FIQ, NULL, NULL}, - {11, ARMV4_5_MODE_FIQ, NULL, NULL}, - {12, ARMV4_5_MODE_FIQ, NULL, NULL}, - {13, ARMV4_5_MODE_FIQ, NULL, NULL}, - {14, ARMV4_5_MODE_FIQ, NULL, NULL}, - - {13, ARMV4_5_MODE_IRQ, NULL, NULL}, - {14, ARMV4_5_MODE_IRQ, NULL, NULL}, - - {13, ARMV4_5_MODE_SVC, NULL, NULL}, - {14, ARMV4_5_MODE_SVC, NULL, NULL}, - - {13, ARMV4_5_MODE_ABT, NULL, NULL}, - {14, ARMV4_5_MODE_ABT, NULL, NULL}, - - {13, ARMV4_5_MODE_UND, NULL, NULL}, - {14, ARMV4_5_MODE_UND, NULL, NULL}, - - {16, ARMV4_5_MODE_ANY, NULL, NULL}, - {16, ARMV4_5_MODE_FIQ, NULL, NULL}, - {16, ARMV4_5_MODE_IRQ, NULL, NULL}, - {16, ARMV4_5_MODE_SVC, NULL, NULL}, - {16, ARMV4_5_MODE_ABT, NULL, NULL}, - {16, ARMV4_5_MODE_UND, NULL, NULL}, - - {13, ARMV7A_MODE_MON, NULL, NULL}, - {14, ARMV7A_MODE_MON, NULL, NULL}, - {16, ARMV7A_MODE_MON, NULL, NULL} -}; - -/* map core mode (USR, FIQ, ...) and register number to indizes into the register cache */ -int armv7a_core_reg_map[8][17] = -{ - { /* USR */ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 31 - }, - { /* FIQ */ - 0, 1, 2, 3, 4, 5, 6, 7, 16, 17, 18, 19, 20, 21, 22, 15, 32 - }, - { /* IRQ */ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 23, 24, 15, 33 - }, - { /* SVC */ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 25, 26, 15, 34 - }, - { /* ABT */ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 27, 28, 15, 35 - }, - { /* UND */ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 29, 30, 15, 36 - }, - { /* SYS */ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 31 - }, - { /* MON */ - /* TODO Fix the register mapping for mon, we need r13_mon, - * r14_mon and spsr_mon - */ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 31 - } -}; +#include "arm_opcodes.h" -uint8_t armv7a_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; -reg_t armv7a_gdb_dummy_fp_reg = +static void armv7a_show_fault_registers(struct target *target) { - "GDB dummy floating-point register", armv7a_gdb_dummy_fp_value, - 0, 1, 96, NULL, 0, NULL, 0 -}; + uint32_t dfsr, ifsr, dfar, ifar; + struct armv7a_common *armv7a = target_to_armv7a(target); + struct arm_dpm *dpm = armv7a->armv4_5_common.dpm; + int retval; + + retval = dpm->prepare(dpm); + if (retval != ERROR_OK) + return; + + /* ARMV4_5_MRC(cpnum, op1, r0, CRn, CRm, op2) */ + + /* c5/c0 - {data, instruction} fault status registers */ + retval = dpm->instr_read_data_r0(dpm, + ARMV4_5_MRC(15, 0, 0, 5, 0, 0), + &dfsr); + if (retval != ERROR_OK) + goto done; + + retval = dpm->instr_read_data_r0(dpm, + ARMV4_5_MRC(15, 0, 0, 5, 0, 1), + &ifsr); + if (retval != ERROR_OK) + goto done; + + /* c6/c0 - {data, instruction} fault address registers */ + retval = dpm->instr_read_data_r0(dpm, + ARMV4_5_MRC(15, 0, 0, 6, 0, 0), + &dfar); + if (retval != ERROR_OK) + goto done; + + retval = dpm->instr_read_data_r0(dpm, + ARMV4_5_MRC(15, 0, 0, 6, 0, 2), + &ifar); + if (retval != ERROR_OK) + goto done; + + LOG_USER("Data fault registers DFSR: %8.8" PRIx32 + ", DFAR: %8.8" PRIx32, dfsr, dfar); + LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32 + ", IFAR: %8.8" PRIx32, ifsr, ifar); + +done: + /* (void) */ dpm->finish(dpm); +} -int armv7a_arch_state(struct target_s *target) +int armv7a_arch_state(struct target *target) { static const char *state[] = { "disabled", "enabled" }; - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; + struct armv7a_common *armv7a = target_to_armv7a(target); + struct arm *armv4_5 = &armv7a->armv4_5_common; - if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) + if (armv7a->common_magic != ARMV7_COMMON_MAGIC) { - LOG_ERROR("BUG: called for a non-ARMv4/5 target"); - exit(-1); + LOG_ERROR("BUG: called for a non-ARMv7A target"); + return ERROR_INVALID_ARGUMENTS; } - LOG_USER("target halted in %s state due to %s, current mode: %s\n" - "%s: 0x%8.8x pc: 0x%8.8x\n" - "MMU: %s, D-Cache: %s, I-Cache: %s", - armv7a_state_strings[armv4_5->core_state], - Jim_Nvp_value2name_simple(nvp_target_debug_reason, - target->debug_reason)->name, - armv7a_mode_strings[ - armv7a_mode_to_number(armv4_5->core_mode)], - armv7a_core_reg_list[armv7a_core_reg_map[ - armv7a_mode_to_number(armv4_5->core_mode)][16]], - buf_get_u32(ARMV7A_CORE_REG_MODE(armv4_5->core_cache, - armv4_5->core_mode, 16).value, 0, 32), - buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32), + arm_arch_state(target); + + LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s", state[armv7a->armv4_5_mmu.mmu_enabled], state[armv7a->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled], state[armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled]); + if (armv4_5->core_mode == ARM_MODE_ABT) + armv7a_show_fault_registers(target); + if (target->debug_reason == DBG_REASON_WATCHPOINT) + LOG_USER("Watchpoint triggered at PC %#08x", + (unsigned) armv7a->dpm.wp_pc); + return ERROR_OK; } -static int handle_dap_baseaddr_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(handle_dap_baseaddr_command) { - target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - swjdp_common_t *swjdp = &armv7a->swjdp_info; + struct target *target = get_current_target(CMD_CTX); + struct armv7a_common *armv7a = target_to_armv7a(target); + struct swjdp_common *swjdp = &armv7a->swjdp_info; - return dap_baseaddr_command(cmd_ctx, swjdp, args, argc); + return CALL_COMMAND_HANDLER(dap_baseaddr_command, swjdp); } -static int handle_dap_memaccess_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(handle_dap_memaccess_command) { - target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - swjdp_common_t *swjdp = &armv7a->swjdp_info; + struct target *target = get_current_target(CMD_CTX); + struct armv7a_common *armv7a = target_to_armv7a(target); + struct swjdp_common *swjdp = &armv7a->swjdp_info; - return dap_memaccess_command(cmd_ctx, swjdp, args, argc); + return CALL_COMMAND_HANDLER(dap_memaccess_command, swjdp); } -static int handle_dap_apsel_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(handle_dap_apsel_command) { - target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - swjdp_common_t *swjdp = &armv7a->swjdp_info; + struct target *target = get_current_target(CMD_CTX); + struct armv7a_common *armv7a = target_to_armv7a(target); + struct swjdp_common *swjdp = &armv7a->swjdp_info; - return dap_apsel_command(cmd_ctx, swjdp, args, argc); + return CALL_COMMAND_HANDLER(dap_apsel_command, swjdp); } -static int handle_dap_apid_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(handle_dap_apid_command) { - target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - swjdp_common_t *swjdp = &armv7a->swjdp_info; + struct target *target = get_current_target(CMD_CTX); + struct armv7a_common *armv7a = target_to_armv7a(target); + struct swjdp_common *swjdp = &armv7a->swjdp_info; - return dap_apid_command(cmd_ctx, swjdp, args, argc); + return CALL_COMMAND_HANDLER(dap_apid_command, swjdp); } -static int handle_dap_info_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(handle_dap_info_command) { - target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5 = target->arch_info; - armv7a_common_t *armv7a = armv4_5->arch_info; - swjdp_common_t *swjdp = &armv7a->swjdp_info; + struct target *target = get_current_target(CMD_CTX); + struct armv7a_common *armv7a = target_to_armv7a(target); + struct swjdp_common *swjdp = &armv7a->swjdp_info; uint32_t apsel; - apsel = swjdp->apsel; - if (argc > 0) - apsel = strtoul(args[0], NULL, 0); + switch (CMD_ARGC) { + case 0: + apsel = swjdp->apsel; + break; + case 1: + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); + break; + default: + return ERROR_COMMAND_SYNTAX_ERROR; + } - return dap_info_command(cmd_ctx, swjdp, apsel); + return dap_info_command(CMD_CTX, swjdp, apsel); } -int armv7a_register_commands(struct command_context_s *cmd_ctx) -{ - command_t *arm_adi_v5_dap_cmd; - - arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap", - NULL, COMMAND_ANY, - "cortex dap specific commands"); - - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "info", - handle_dap_info_command, COMMAND_EXEC, - "dap info for ap [num], " - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apsel", - handle_dap_apsel_command, COMMAND_EXEC, - "select a different AP [num] (default 0)"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apid", - handle_dap_apid_command, COMMAND_EXEC, - "return id reg from AP [num], " - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "baseaddr", - handle_dap_baseaddr_command, COMMAND_EXEC, - "return debug base address from AP [num], " - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "memaccess", - handle_dap_memaccess_command, COMMAND_EXEC, - "set/get number of extra tck for mem-ap memory " - "bus access [0-255]"); +/* FIXME this table should be part of generic DAP support, and + * be shared by the ARMv7-A/R and ARMv7-M support ... + */ +static const struct command_registration armv7a_exec_command_handlers[] = { + { + .name = "info", + .handler = handle_dap_info_command, + .mode = COMMAND_EXEC, + .help = "display ROM table for MEM-AP " + "(default currently selected AP)", + .usage = "[ap_num]", + }, + { + .name = "apsel", + .handler = handle_dap_apsel_command, + .mode = COMMAND_EXEC, + .help = "Set the currently selected AP (default 0) " + "and display the result", + .usage = "[ap_num]", + }, + { + .name = "apid", + .handler = handle_dap_apid_command, + .mode = COMMAND_EXEC, + .help = "return ID register from AP " + "(default currently selected AP)", + .usage = "[ap_num]", + }, + { + .name = "baseaddr", + .handler = handle_dap_baseaddr_command, + .mode = COMMAND_EXEC, + .help = "return debug base address from MEM-AP " + "(default currently selected AP)", + .usage = "[ap_num]", + }, + { + .name = "memaccess", + .handler = handle_dap_memaccess_command, + .mode = COMMAND_EXEC, + .help = "set/get number of extra tck for MEM-AP memory " + "bus access [0-255]", + .usage = "[cycles]", + }, + COMMAND_REGISTRATION_DONE +}; +const struct command_registration armv7a_command_handlers[] = { + { + .name = "dap", + .mode = COMMAND_ANY, + .help = "Cortex DAP command group", + .chain = armv7a_exec_command_handlers, + }, + COMMAND_REGISTRATION_DONE +}; - return ERROR_OK; -}