X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv7a_cache.c;h=3e5f8d6def98a371d39b282d123d9da4befffe65;hp=a049174cbe85b65c028ba351fac34ba8c9f541bf;hb=e195b0bc812deaad4d770cb1044c5a1b905d8671;hpb=9484dd5ebfcc7f9426f8ffc37f5486cd0387bb6a diff --git a/src/target/armv7a_cache.c b/src/target/armv7a_cache.c index a049174cbe..3e5f8d6def 100644 --- a/src/target/armv7a_cache.c +++ b/src/target/armv7a_cache.c @@ -11,6 +11,9 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program. If not, see . * ***************************************************************************/ #ifdef HAVE_CONFIG_H @@ -145,14 +148,15 @@ int armv7a_cache_auto_flush_all_data(struct target *target) } else retval = armv7a_l1_d_cache_clean_inval_all(target); - /* do outer cache flushing after inner caches have been flushed */ - retval = arm7a_l2x_flush_all_data(target); + if (retval != ERROR_OK) + return retval; - return retval; + /* do outer cache flushing after inner caches have been flushed */ + return arm7a_l2x_flush_all_data(target); } -static int armv7a_l1_d_cache_inval_virt(struct target *target, uint32_t virt, +int armv7a_l1_d_cache_inval_virt(struct target *target, uint32_t virt, uint32_t size) { struct armv7a_common *armv7a = target_to_armv7a(target); @@ -218,7 +222,8 @@ int armv7a_l1_d_cache_clean_virt(struct target *target, uint32_t virt, struct armv7a_common *armv7a = target_to_armv7a(target); struct arm_dpm *dpm = armv7a->arm.dpm; struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache; - uint32_t i, linelen = armv7a_cache->dminline; + uint32_t linelen = armv7a_cache->dminline; + uint32_t va_line, va_end; int retval; retval = armv7a_l1_d_cache_sanity_check(target); @@ -229,15 +234,19 @@ int armv7a_l1_d_cache_clean_virt(struct target *target, uint32_t virt, if (retval != ERROR_OK) goto done; - for (i = 0; i < size; i += linelen) { - uint32_t offs = virt + i; + va_line = virt & (-linelen); + va_end = virt + size; + while (va_line < va_end) { /* DCCMVAC - Data Cache Clean by MVA to PoC */ retval = dpm->instr_write_data_r0(dpm, - ARMV4_5_MCR(15, 0, 0, 7, 10, 1), offs); + ARMV4_5_MCR(15, 0, 0, 7, 10, 1), va_line); if (retval != ERROR_OK) goto done; + va_line += linelen; } + + dpm->finish(dpm); return retval; done: @@ -253,7 +262,8 @@ int armv7a_l1_d_cache_flush_virt(struct target *target, uint32_t virt, struct armv7a_common *armv7a = target_to_armv7a(target); struct arm_dpm *dpm = armv7a->arm.dpm; struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache; - uint32_t i, linelen = armv7a_cache->dminline; + uint32_t linelen = armv7a_cache->dminline; + uint32_t va_line, va_end; int retval; retval = armv7a_l1_d_cache_sanity_check(target); @@ -264,15 +274,19 @@ int armv7a_l1_d_cache_flush_virt(struct target *target, uint32_t virt, if (retval != ERROR_OK) goto done; - for (i = 0; i < size; i += linelen) { - uint32_t offs = virt + i; + va_line = virt & (-linelen); + va_end = virt + size; + while (va_line < va_end) { /* DCCIMVAC */ retval = dpm->instr_write_data_r0(dpm, - ARMV4_5_MCR(15, 0, 0, 7, 14, 1), offs); + ARMV4_5_MCR(15, 0, 0, 7, 14, 1), va_line); if (retval != ERROR_OK) goto done; + va_line += linelen; } + + dpm->finish(dpm); return retval; done: