X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv7m.c;fp=src%2Ftarget%2Farmv7m.c;h=6f6a170b701be8c02c822fe2fe8c5a2bb9566b8b;hp=2db2ce2dd58796a4aeedb7a2b8967d15df053041;hb=bced97cce95a31987f18674bb022e6d263b4f29c;hpb=dce9a03cb2c50ef6c3f084c7d13325369559ebce

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 2db2ce2dd5..6f6a170b70 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -528,11 +528,14 @@ int armv7m_start_algorithm(struct target *target,
 
 	/* Store all non-debug execution registers to armv7m_algorithm_info context */
 	for (unsigned i = 0; i < armv7m->arm.core_cache->num_regs; i++) {
+		struct reg *reg = &armv7m->arm.core_cache->reg_list[i];
+		if (!reg->valid)
+			armv7m_get_core_reg(reg);
 
-		armv7m_algorithm_info->context[i] = buf_get_u32(
-				armv7m->arm.core_cache->reg_list[i].value,
-				0,
-				32);
+		if (!reg->valid)
+			LOG_TARGET_WARNING(target, "Storing invalid register %s", reg->name);
+
+		armv7m_algorithm_info->context[i] = buf_get_u32(reg->value, 0, 32);
 	}
 
 	for (int i = 0; i < num_mem_params; i++) {