X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv7m.h;h=ca921468fc15c4511bf9d5e8ebd8a1518b414a6c;hp=ac559b9e942318a93eea6aadaa5a2cf0dedadf7b;hb=9d4c466c219039bd6a2ea03467cd3ee8be2a0e76;hpb=6f929dbd93e1b2c0373f389060bf64e60e8194ab

diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index ac559b9e94..ca921468fc 100644
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -100,30 +100,41 @@ enum
 
 struct armv7m_common
 {
+	struct arm	arm;
+
 	int common_magic;
 	struct reg_cache *core_cache;
 	enum armv7m_mode core_mode;
 	int exception_number;
-	struct swjdp_common swjdp_info;
+	struct adiv5_dap dap;
+
+	uint32_t demcr;
 
 	/* Direct processor core register read and writes */
-	int (*load_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t *value);
-	int (*store_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t value);
+	int (*load_core_reg_u32)(struct target *target,
+		enum armv7m_regtype type, uint32_t num, uint32_t *value);
+	int (*store_core_reg_u32)(struct target *target,
+		enum armv7m_regtype type, uint32_t num, uint32_t value);
+
 	/* register cache to processor synchronization */
 	int (*read_core_reg)(struct target *target, unsigned num);
 	int (*write_core_reg)(struct target *target, unsigned num);
 
 	int (*examine_debug_reason)(struct target *target);
-	void (*post_debug_entry)(struct target *target);
+	int (*post_debug_entry)(struct target *target);
 
 	void (*pre_restore_context)(struct target *target);
-	void (*post_restore_context)(struct target *target);
 };
 
 static inline struct armv7m_common *
 target_to_armv7m(struct target *target)
 {
-	return target->arch_info;
+	return container_of(target->arch_info, struct armv7m_common, arm);
+}
+
+static inline bool is_armv7m(struct armv7m_common *armv7m)
+{
+	return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
 }
 
 struct armv7m_algorithm
@@ -131,6 +142,8 @@ struct armv7m_algorithm
 	int common_magic;
 
 	enum armv7m_mode core_mode;
+
+	uint32_t context[ARMV7M_CONTROL + 1]; //ARMV7M_NUM_REGS
 };
 
 struct armv7m_core_reg
@@ -157,6 +170,18 @@ int armv7m_run_algorithm(struct target *target,
 		uint32_t entry_point, uint32_t exit_point,
 		int timeout_ms, void *arch_info);
 
+int armv7m_start_algorithm(struct target *target,
+		int num_mem_params, struct mem_param *mem_params,
+		int num_reg_params, struct reg_param *reg_params,
+		uint32_t entry_point, uint32_t exit_point,
+		void *arch_info);
+
+int armv7m_wait_algorithm(struct target *target,
+		int num_mem_params, struct mem_param *mem_params,
+		int num_reg_params, struct reg_param *reg_params,
+		uint32_t exit_point, int timeout_ms,
+		void *arch_info);
+
 int armv7m_invalidate_core_regs(struct target *target);
 
 int armv7m_restore_context(struct target *target);
@@ -166,6 +191,8 @@ int armv7m_checksum_memory(struct target *target,
 int armv7m_blank_check_memory(struct target *target,
 		uint32_t address, uint32_t count, uint32_t* blank);
 
+int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
+
 extern const struct command_registration armv7m_command_handlers[];
 
 #endif /* ARMV7M_H */