X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_a.c;h=7ecf428dc594d056188011a0d312dff4b113c978;hp=ab52dd75a5b294e4e6f3ab9cd47e9bd9fc327859;hb=13ac3d556c8cae37807801b64c289a3e9bfde359;hpb=eaa6d8f8392cec3fdef2fafab9af06ab627de445

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index ab52dd75a5..7ecf428dc5 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -2871,8 +2871,11 @@ static int cortex_a_examine_first(struct target *target)
 		/* Lookup 0x15 -- Processor DAP */
 		retval = dap_lookup_cs_component(swjdp, 1, dbgbase, 0x15,
 				&armv7a->debug_base, &coreidx);
-		if (retval != ERROR_OK)
+		if (retval != ERROR_OK) {
+			LOG_ERROR("Can't detect %s's dbgbase from the ROM table; you need to specify it explicitly.",
+				  target->cmd_name);
 			return retval;
+		}
 		LOG_DEBUG("Detected core %" PRId32 " dbgbase: %08" PRIx32,
 			  coreidx, armv7a->debug_base);
 	} else