X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_a.c;h=ab52dd75a5b294e4e6f3ab9cd47e9bd9fc327859;hp=9ae04322b91e97713ae4daeee13eb068a49779bc;hb=e968fd189537892caaf91d6012e77bafa0b76751;hpb=0836a0fa21e7f2363891c04b195ddb91f94abf28

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 9ae04322b9..ab52dd75a5 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -146,14 +146,14 @@ static int cortex_a_mmu_modify(struct target *target, int enable)
 					cortex_a->cp15_control_reg_curr);
 		}
 	} else {
-		if (cortex_a->cp15_control_reg_curr & 0x4U) {
-			/*  data cache is active */
-			cortex_a->cp15_control_reg_curr &= ~0x4U;
-			/* flush data cache armv7 function to be called */
-			if (armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache)
-				armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache(target);
-		}
 		if ((cortex_a->cp15_control_reg_curr & 0x1U)) {
+			if (cortex_a->cp15_control_reg_curr & 0x4U) {
+				/* data cache is active */
+				cortex_a->cp15_control_reg_curr &= ~0x4U;
+				/* flush data cache armv7 function to be called */
+				if (armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache)
+					armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache(target);
+			}
 			cortex_a->cp15_control_reg_curr &= ~0x1U;
 			retval = armv7a->arm.mcr(target, 15,
 					0, 0,	/* op1, op2 */