X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_a8.c;h=e1bd2e3241e14f914df3a133c652d274cb1afd92;hp=7f0189b2c1ef5fa58900299016b4241813d56e4a;hb=af949b2531d2a8863d077025db40cbb170d13a63;hpb=f96d6054e65708e7abdceac673f1a18fec3204b6 diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index 7f0189b2c1..e1bd2e3241 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -44,9 +44,9 @@ static int cortex_a8_poll(target_t *target); static int cortex_a8_debug_entry(target_t *target); static int cortex_a8_restore_context(target_t *target); static int cortex_a8_set_breakpoint(struct target_s *target, - breakpoint_t *breakpoint, uint8_t matchmode); + struct breakpoint *breakpoint, uint8_t matchmode); static int cortex_a8_unset_breakpoint(struct target_s *target, - breakpoint_t *breakpoint); + struct breakpoint *breakpoint); static int cortex_a8_dap_read_coreregister_u32(target_t *target, uint32_t *value, int regnum); static int cortex_a8_dap_write_coreregister_u32(target_t *target, @@ -64,7 +64,7 @@ static int cortex_a8_dap_write_coreregister_u32(target_t *target, */ static int cortex_a8_init_debug_access(target_t *target) { - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; int retval; @@ -94,7 +94,7 @@ int cortex_a8_exec_opcode(target_t *target, uint32_t opcode) { uint32_t dscr; int retval; - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; LOG_DEBUG("exec opcode 0x%08" PRIx32, opcode); @@ -135,7 +135,7 @@ static int cortex_a8_read_regs_through_mem(target_t *target, uint32_t address, uint32_t * regfile) { int retval = ERROR_OK; - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; cortex_a8_dap_read_coreregister_u32(target, regfile, 0); @@ -152,7 +152,7 @@ static int cortex_a8_read_cp(target_t *target, uint32_t *value, uint8_t CP, uint8_t op1, uint8_t CRn, uint8_t CRm, uint8_t op2) { int retval; - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; cortex_a8_exec_opcode(target, ARMV4_5_MRC(CP, op1, 0, CRn, CRm, op2)); @@ -171,7 +171,7 @@ static int cortex_a8_write_cp(target_t *target, uint32_t value, { int retval; uint32_t dscr; - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; LOG_DEBUG("CP%i, CRn %i, value 0x%08" PRIx32, CP, CRn, value); @@ -235,7 +235,7 @@ static int cortex_a8_dap_read_coreregister_u32(target_t *target, int retval = ERROR_OK; uint8_t reg = regnum&0xFF; uint32_t dscr; - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; if (reg > 16) @@ -276,7 +276,7 @@ static int cortex_a8_dap_write_coreregister_u32(target_t *target, uint32_t value int retval = ERROR_OK; uint8_t Rd = regnum&0xFF; uint32_t dscr; - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; LOG_DEBUG("register %i, value 0x%08" PRIx32, regnum, value); @@ -323,7 +323,7 @@ static int cortex_a8_dap_write_coreregister_u32(target_t *target, uint32_t value static int cortex_a8_dap_write_memap_register_u32(target_t *target, uint32_t address, uint32_t value) { int retval; - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; retval = mem_ap_write_atomic_u32(swjdp, address, value); @@ -339,8 +339,8 @@ static int cortex_a8_poll(target_t *target) { int retval = ERROR_OK; uint32_t dscr; - struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); - struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common; + struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common *armv7a = &cortex_a8->armv7a_common; struct swjdp_common *swjdp = &armv7a->swjdp_info; enum target_state prev_target_state = target->state; uint8_t saved_apsel = dap_ap_get_select(swjdp); @@ -404,7 +404,7 @@ static int cortex_a8_halt(target_t *target) { int retval = ERROR_OK; uint32_t dscr; - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; uint8_t saved_apsel = dap_ap_get_select(swjdp); dap_ap_select(swjdp, swjdp_debugap); @@ -441,11 +441,11 @@ out: static int cortex_a8_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) { - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common; struct swjdp_common *swjdp = &armv7a->swjdp_info; -// breakpoint_t *breakpoint = NULL; +// struct breakpoint *breakpoint = NULL; uint32_t resume_pc, dscr; uint8_t saved_apsel = dap_ap_get_select(swjdp); @@ -564,9 +564,9 @@ static int cortex_a8_debug_entry(target_t *target) int i; uint32_t regfile[16], pc, cpsr, dscr; int retval = ERROR_OK; - working_area_t *regfile_working_area = NULL; - struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct working_area *regfile_working_area = NULL; + struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common; struct swjdp_common *swjdp = &armv7a->swjdp_info; @@ -690,8 +690,8 @@ static int cortex_a8_debug_entry(target_t *target) static void cortex_a8_post_debug_entry(target_t *target) { - struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); - struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common; + struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common *armv7a = &cortex_a8->armv7a_common; // cortex_a8_read_cp(target, &cp15_control_register, 15, 0, 1, 0, 0); /* examine cp15 control reg */ @@ -723,10 +723,10 @@ static void cortex_a8_post_debug_entry(target_t *target) static int cortex_a8_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints) { - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common; - breakpoint_t *breakpoint = NULL; - breakpoint_t stepbreakpoint; + struct breakpoint *breakpoint = NULL; + struct breakpoint stepbreakpoint; int timeout = 100; @@ -803,7 +803,7 @@ static int cortex_a8_restore_context(target_t *target) { int i; uint32_t value; - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common; LOG_DEBUG(" "); @@ -961,15 +961,15 @@ int cortex_a8_write_core_reg(struct target_s *target, int num, /* Setup hardware Breakpoint Register Pair */ static int cortex_a8_set_breakpoint(struct target_s *target, - breakpoint_t *breakpoint, uint8_t matchmode) + struct breakpoint *breakpoint, uint8_t matchmode) { int retval; int brp_i=0; uint32_t control; uint8_t byte_addr_select = 0x0F; - struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); - struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common; - cortex_a8_brp_t * brp_list = cortex_a8->brp_list; + struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common *armv7a = &cortex_a8->armv7a_common; + struct cortex_a8_brp * brp_list = cortex_a8->brp_list; if (breakpoint->set) { @@ -1035,12 +1035,12 @@ static int cortex_a8_set_breakpoint(struct target_s *target, return ERROR_OK; } -static int cortex_a8_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +static int cortex_a8_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoint) { int retval; - struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); - struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common; - cortex_a8_brp_t * brp_list = cortex_a8->brp_list; + struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common *armv7a = &cortex_a8->armv7a_common; + struct cortex_a8_brp * brp_list = cortex_a8->brp_list; if (!breakpoint->set) { @@ -1093,9 +1093,9 @@ static int cortex_a8_unset_breakpoint(struct target_s *target, breakpoint_t *bre return ERROR_OK; } -int cortex_a8_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +int cortex_a8_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint) { - struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); + struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target); if ((breakpoint->type == BKPT_HARD) && (cortex_a8->brp_num_available < 1)) { @@ -1110,9 +1110,9 @@ int cortex_a8_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) return ERROR_OK; } -static int cortex_a8_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +static int cortex_a8_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint) { - struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); + struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target); #if 0 /* It is perfectly possible to remove brakpoints while the taget is running */ @@ -1178,7 +1178,7 @@ static int cortex_a8_deassert_reset(target_t *target) static int cortex_a8_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; int retval = ERROR_OK; @@ -1213,7 +1213,7 @@ static int cortex_a8_read_memory(struct target_s *target, uint32_t address, int cortex_a8_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; int retval; @@ -1299,7 +1299,7 @@ static int cortex_a8_handle_target_request(void *priv) target_t *target = priv; if (!target->type->examined) return ERROR_OK; - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); struct swjdp_common *swjdp = &armv7a->swjdp_info; if (!target->dbg_msg_enabled) @@ -1338,8 +1338,8 @@ static int cortex_a8_handle_target_request(void *priv) static int cortex_a8_examine(struct target_s *target) { - struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target); - struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common; + struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target); + struct armv7a_common *armv7a = &cortex_a8->armv7a_common; struct swjdp_common *swjdp = &armv7a->swjdp_info; int i; int retval = ERROR_OK; @@ -1392,7 +1392,7 @@ static int cortex_a8_examine(struct target_s *target) cortex_a8->brp_num = ((didr >> 24) & 0x0F) + 1; cortex_a8->brp_num_context = ((didr >> 20) & 0x0F) + 1; cortex_a8->brp_num_available = cortex_a8->brp_num; - cortex_a8->brp_list = calloc(cortex_a8->brp_num, sizeof(cortex_a8_brp_t)); + cortex_a8->brp_list = calloc(cortex_a8->brp_num, sizeof(struct cortex_a8_brp)); // cortex_a8->brb_enabled = ????; for (i = 0; i < cortex_a8->brp_num; i++) { @@ -1409,7 +1409,7 @@ static int cortex_a8_examine(struct target_s *target) /* Setup Watchpoint Register Pairs */ cortex_a8->wrp_num = ((didr >> 28) & 0x0F) + 1; cortex_a8->wrp_num_available = cortex_a8->wrp_num; - cortex_a8->wrp_list = calloc(cortex_a8->wrp_num, sizeof(cortex_a8_wrp_t)); + cortex_a8->wrp_list = calloc(cortex_a8->wrp_num, sizeof(struct cortex_a8_wrp)); for (i = 0; i < cortex_a8->wrp_num; i++) { cortex_a8->wrp_list[i].used = 0; @@ -1435,7 +1435,7 @@ static int cortex_a8_examine(struct target_s *target) static void cortex_a8_build_reg_cache(target_t *target) { - reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); + struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache); struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); (*cache_p) = armv4_5_build_reg_cache(target, armv4_5); @@ -1451,16 +1451,16 @@ static int cortex_a8_init_target(struct command_context_s *cmd_ctx, } int cortex_a8_init_arch_info(target_t *target, - cortex_a8_common_t *cortex_a8, struct jtag_tap *tap) + struct cortex_a8_common *cortex_a8, struct jtag_tap *tap) { - armv4_5_common_t *armv4_5; - armv7a_common_t *armv7a; + struct arm *armv4_5; + struct armv7a_common *armv7a; armv7a = &cortex_a8->armv7a_common; armv4_5 = &armv7a->armv4_5_common; struct swjdp_common *swjdp = &armv7a->swjdp_info; - /* Setup cortex_a8_common_t */ + /* Setup struct cortex_a8_common */ cortex_a8->common_magic = CORTEX_A8_COMMON_MAGIC; armv4_5->arch_info = armv7a; @@ -1519,7 +1519,7 @@ LOG_DEBUG(" "); static int cortex_a8_target_create(struct target_s *target, Jim_Interp *interp) { - cortex_a8_common_t *cortex_a8 = calloc(1, sizeof(cortex_a8_common_t)); + struct cortex_a8_common *cortex_a8 = calloc(1, sizeof(struct cortex_a8_common)); cortex_a8_init_arch_info(target, cortex_a8, target->tap); @@ -1529,7 +1529,7 @@ static int cortex_a8_target_create(struct target_s *target, Jim_Interp *interp) COMMAND_HANDLER(cortex_a8_handle_cache_info_command) { target_t *target = get_current_target(cmd_ctx); - struct armv7a_common_s *armv7a = target_to_armv7a(target); + struct armv7a_common *armv7a = target_to_armv7a(target); return armv4_5_handle_cache_info_command(cmd_ctx, &armv7a->armv4_5_mmu.armv4_5_cache);