X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m.c;h=06e1c1c754ce5f0716a227445a121f1f15f7fa2f;hp=e8ad770ec1f6e663cb5cf3d44a7b4e64ec98e848;hb=d140fb27c6afbfa1fe609b5f0db274d4a5273483;hpb=63aa91701532451889e2bc0666cd3d81b825afff

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index e8ad770ec1..06e1c1c754 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -564,6 +564,17 @@ static int cortex_m_poll(struct target *target)
 		}
 	}
 
+	/* Check that target is truly halted, since the target could be resumed externally */
+	if ((prev_target_state == TARGET_HALTED) && !(cortex_m->dcb_dhcsr & S_HALT)) {
+		/* registers are now invalid */
+		register_cache_invalidate(armv7m->arm.core_cache);
+
+		target->state = TARGET_RUNNING;
+		LOG_WARNING("%s: external resume detected", target_name(target));
+		target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
+		retval = ERROR_OK;
+	}
+
 	/* Did we detect a failure condition that we cleared? */
 	if (detected_failure != ERROR_OK)
 		retval = detected_failure;