X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m.c;h=e442fc3b66ef4da8a6f7a22f2aacb50fa13f013c;hp=941fef16a1565735662159da6b924058e1b476b4;hb=f69adafb3dd252eaf6b269b7993b29d3c78a91c8;hpb=b19505a34377c2bade1aa129108b0c6aec577512

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 941fef16a1..e442fc3b66 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -504,7 +504,7 @@ static int cortex_m_debug_entry(struct target *target)
 
 	/* examine PE security state */
 	bool secure_state = false;
-	if (armv7m->arm.is_armv8m) {
+	if (armv7m->arm.arch == ARM_ARCH_V8M) {
 		uint32_t dscsr;
 
 		retval = mem_ap_read_u32(armv7m->debug_ap, DCB_DSCSR, &dscsr);
@@ -1645,7 +1645,7 @@ static int cortex_m_read_memory(struct target *target, target_addr_t address,
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 
-	if (armv7m->arm.is_armv6m) {
+	if (armv7m->arm.arch == ARM_ARCH_V6M) {
 		/* armv6m does not handle unaligned memory access */
 		if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
 			return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -1659,7 +1659,7 @@ static int cortex_m_write_memory(struct target *target, target_addr_t address,
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 
-	if (armv7m->arm.is_armv6m) {
+	if (armv7m->arm.arch == ARM_ARCH_V6M) {
 		/* armv6m does not handle unaligned memory access */
 		if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
 			return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -2005,7 +2005,7 @@ int cortex_m_examine(struct target *target)
 		unsigned int core = (cpuid >> 4) & 0xf;
 
 		/* Check if it is an ARMv8-M core */
-		armv7m->arm.is_armv8m = true;
+		armv7m->arm.arch = ARM_ARCH_V8M;
 
 		switch (cpuid & ARM_CPUID_PARTNO_MASK) {
 			case CORTEX_M23_PARTNO:
@@ -2021,7 +2021,7 @@ int cortex_m_examine(struct target *target)
 				core = 55;
 				break;
 			default:
-				armv7m->arm.is_armv8m = false;
+				armv7m->arm.arch = ARM_ARCH_V7M;
 				break;
 		}
 
@@ -2063,18 +2063,18 @@ int cortex_m_examine(struct target *target)
 			}
 		} else if (core == 0) {
 			/* Cortex-M0 does not support unaligned memory access */
-			armv7m->arm.is_armv6m = true;
+			armv7m->arm.arch = ARM_ARCH_V6M;
 		}
 
 		/* VECTRESET is supported only on ARMv7-M cores */
-		cortex_m->vectreset_supported = !armv7m->arm.is_armv8m && !armv7m->arm.is_armv6m;
+		cortex_m->vectreset_supported = armv7m->arm.arch == ARM_ARCH_V7M;
 
 		/* Check for FPU, otherwise mark FPU register as non-existent */
 		if (armv7m->fp_feature == FP_NONE)
 			for (size_t idx = ARMV7M_FPU_FIRST_REG; idx <= ARMV7M_FPU_LAST_REG; idx++)
 				armv7m->arm.core_cache->reg_list[idx].exist = false;
 
-		if (!armv7m->arm.is_armv8m)
+		if (armv7m->arm.arch != ARM_ARCH_V8M)
 			for (size_t idx = ARMV8M_FIRST_REG; idx <= ARMV8M_LAST_REG; idx++)
 				armv7m->arm.core_cache->reg_list[idx].exist = false;