X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m3.h;h=e16aa89feb96544664d4997f8e032843656341bd;hp=b2d558d1fbf4498b5f6f3304f929955653d4319f;hb=8c6b95ed162ada54b1165ca0c9b46aa92f92975c;hpb=26a99ed740f4071c9eebba10f7f597844812fc13 diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h index b2d558d1fb..e16aa89feb 100644 --- a/src/target/cortex_m3.h +++ b/src/target/cortex_m3.h @@ -26,8 +26,6 @@ #ifndef CORTEX_M3_H #define CORTEX_M3_H -#include "register.h" -#include "target.h" #include "armv7m.h" @@ -119,22 +117,35 @@ #define FPCR_REPLACE_BKPT_HIGH (2 << 30) #define FPCR_REPLACE_BKPT_BOTH (3 << 30) -typedef struct cortex_m3_fp_comparator_s +struct cortex_m3_fp_comparator { int used; int type; uint32_t fpcr_value; uint32_t fpcr_address; -} cortex_m3_fp_comparator_t; +}; -typedef struct cortex_m3_dwt_comparator_s +struct cortex_m3_dwt_comparator { int used; uint32_t comp; uint32_t mask; uint32_t function; uint32_t dwt_comparator_address; -} cortex_m3_dwt_comparator_t; +}; + +enum cortex_m3_soft_reset_config +{ + CORTEX_M3_RESET_SYSRESETREQ, + CORTEX_M3_RESET_VECTRESET, +}; + +enum cortex_m3_isrmasking_mode +{ + CORTEX_M3_ISRMASK_AUTO, + CORTEX_M3_ISRMASK_OFF, + CORTEX_M3_ISRMASK_ON, +}; struct cortex_m3_common { @@ -152,19 +163,23 @@ struct cortex_m3_common int fp_code_available; int fpb_enabled; int auto_bp_type; - cortex_m3_fp_comparator_t *fp_comparator_list; + struct cortex_m3_fp_comparator *fp_comparator_list; /* Data Watchpoint and Trace (DWT) */ int dwt_num_comp; int dwt_comp_available; - cortex_m3_dwt_comparator_t *dwt_comparator_list; - struct reg_cache_s *dwt_cache; + struct cortex_m3_dwt_comparator *dwt_comparator_list; + struct reg_cache *dwt_cache; + + enum cortex_m3_soft_reset_config soft_reset_config; + + enum cortex_m3_isrmasking_mode isrmasking_mode; struct armv7m_common armv7m; }; static inline struct cortex_m3_common * -target_to_cm3(struct target_s *target) +target_to_cm3(struct target *target) { return container_of(target->arch_info, struct cortex_m3_common, armv7m);