X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_swjdp.c;h=3e094d84dddebc444296e62524ba88d0e106d73d;hp=dc50fea1c4a91ff18b64bb8c5f1d5338db447ee9;hb=39d80bad9bb405dab262ab2c4bedaef18d8c1df8;hpb=3aa95240ece4c99fdb1b5d33e4153d96d3f278ee diff --git a/src/target/cortex_swjdp.c b/src/target/cortex_swjdp.c index dc50fea1c4..3e094d84dd 100644 --- a/src/target/cortex_swjdp.c +++ b/src/target/cortex_swjdp.c @@ -2,6 +2,12 @@ * Copyright (C) 2006 by Magnus Lundin * * lundin@mlu.mine.nu * * * + * Copyright (C) 2008 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * Copyright (C) 2009 by Oyvind Harboe * + * oyvind.harboe@zylin.com * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -21,8 +27,8 @@ * * * CoreSight (Light?) SerialWireJtagDebugPort * * * - * CoreSight™ DAP-Lite TRM, ARM DDI 0316A * - * Cortex-M3™ TRM, ARM DDI 0337C * + * CoreSight(tm) DAP-Lite TRM, ARM DDI 0316A * + * Cortex-M3(tm) TRM, ARM DDI 0337C * * * ***************************************************************************/ #ifdef HAVE_CONFIG_H @@ -35,12 +41,13 @@ #include "cortex_swjdp.h" #include "jtag.h" #include "log.h" +#include "time_support.h" #include /* * Transaction Mode: * swjdp->trans_mode = TRANS_MODE_COMPOSITE; - * Uses Overrun checking mode and does not do actual JTAG send/receive or transaction + * Uses Overrun checking mode and does not do actual JTAG send/receive or transaction * result checking until swjdp_end_transaction() * This must be done before using or deallocating any return variables. * swjdp->trans_mode == TRANS_MODE_ATOMIC @@ -59,11 +66,11 @@ int swjdp_scan(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u8 *outvalu { scan_field_t fields[2]; u8 out_addr_buf; - - jtag_add_end_state(TAP_RTI); + + jtag_add_end_state(TAP_IDLE); arm_jtag_set_instr(jtag_info, instr, NULL); - fields[0].device = jtag_info->chain_pos; + fields[0].tap = jtag_info->tap; fields[0].num_bits = 3; buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1)); fields[0].out_value = &out_addr_buf; @@ -74,7 +81,7 @@ int swjdp_scan(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u8 *outvalu fields[0].in_handler = NULL; fields[0].in_handler_priv = NULL; - fields[1].device = jtag_info->chain_pos; + fields[1].tap = jtag_info->tap; fields[1].num_bits = 32; fields[1].out_value = outvalue; fields[1].out_mask = NULL; @@ -95,11 +102,11 @@ int swjdp_scan_u32(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u32 out scan_field_t fields[2]; u8 out_value_buf[4]; u8 out_addr_buf; - - jtag_add_end_state(TAP_RTI); + + jtag_add_end_state(TAP_IDLE); arm_jtag_set_instr(jtag_info, instr, NULL); - fields[0].device = jtag_info->chain_pos; + fields[0].tap = jtag_info->tap; fields[0].num_bits = 3; buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1)); fields[0].out_value = &out_addr_buf; @@ -110,7 +117,7 @@ int swjdp_scan_u32(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u32 out fields[0].in_handler = NULL; fields[0].in_handler_priv = NULL; - fields[1].device = jtag_info->chain_pos; + fields[1].tap = jtag_info->tap; fields[1].num_bits = 32; buf_set_u32(out_value_buf, 0, 32, outvalue); fields[1].out_value = out_value_buf; @@ -134,7 +141,7 @@ int swjdp_scan_u32(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u32 out return ERROR_OK; } -/* scan_inout_check adds one extra inscan for DPAP_READ commands to read variables */ +/* scan_inout_check adds one extra inscan for DPAP_READ commands to read variables */ int scan_inout_check(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *outvalue, u8 *invalue) { swjdp_scan(swjdp->jtag_info, instr, reg_addr, RnW, outvalue, NULL, NULL); @@ -142,7 +149,7 @@ int scan_inout_check(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *o { swjdp_scan(swjdp->jtag_info, SWJDP_IR_DPACC, DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack); } - + /* In TRANS_MODE_ATOMIC all SWJDP_IR_APACC transactions wait for ack=OK/FAULT and the check CTRL_STAT */ if ((instr == SWJDP_IR_APACC) && (swjdp->trans_mode == TRANS_MODE_ATOMIC)) { @@ -159,7 +166,7 @@ int scan_inout_check_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u { swjdp_scan_u32(swjdp->jtag_info, SWJDP_IR_DPACC, DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack); } - + /* In TRANS_MODE_ATOMIC all SWJDP_IR_APACC transactions wait for ack=OK/FAULT and then check CTRL_STAT */ if ((instr == SWJDP_IR_APACC) && (swjdp->trans_mode == TRANS_MODE_ATOMIC)) { @@ -171,35 +178,57 @@ int scan_inout_check_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u int swjdp_transaction_endcheck(swjdp_common_t *swjdp) { - int waitcount = 0; + int retval; u32 ctrlstat; + /* too expensive to call keep_alive() here */ + + /* Danger!!!! BROKEN!!!! */ scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); + /* Danger!!!! BROKEN!!!! Why will jtag_execute_queue() fail here???? + R956 introduced the check on return value here and now Michael Schwingen reports + that this code no longer works.... + + https://lists.berlios.de/pipermail/openocd-development/2008-September/003107.html + */ + if ((retval=jtag_execute_queue())!=ERROR_OK) + { + LOG_ERROR("BUG: Why does this fail the first time????"); + } + /* Why??? second time it works??? */ scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); - jtag_execute_queue(); - + if ((retval=jtag_execute_queue())!=ERROR_OK) + return retval; + swjdp->ack = swjdp->ack & 0x7; - - while (swjdp->ack != 2) + + if (swjdp->ack != 2) { - if (swjdp->ack == 1) + long long then=timeval_ms(); + while (swjdp->ack != 2) { - waitcount++; - if (waitcount > 100) + if (swjdp->ack == 1) + { + if ((timeval_ms()-then) > 1000) + { + LOG_WARNING("Timeout (1000ms) waiting for ACK = OK/FAULT in SWJDP transaction"); + return ERROR_JTAG_DEVICE_ERROR; + } + } + else { - LOG_WARNING("Timeout waiting for ACK = OK/FAULT in SWJDP transaction"); + LOG_WARNING("Invalid ACK in SWJDP transaction"); return ERROR_JTAG_DEVICE_ERROR; } - } - else - { - LOG_WARNING("Invalid ACK in SWJDP transaction"); - return ERROR_JTAG_DEVICE_ERROR; - } - scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); - jtag_execute_queue(); - swjdp->ack = swjdp->ack & 0x7; + scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); + if ((retval=jtag_execute_queue())!=ERROR_OK) + return retval; + swjdp->ack = swjdp->ack & 0x7; + } + } else + { + /* common code path avoids fn to timeval_ms() */ } /* Check for STICKYERR and STICKYORUN */ @@ -214,28 +243,30 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp) else { u32 dcb_dhcsr,nvic_shcsr, nvic_bfar, nvic_cfsr; - + if (ctrlstat & SSTICKYORUN) LOG_ERROR("SWJ-DP OVERRUN - check clock or reduce jtag speed"); - + if (ctrlstat & SSTICKYERR) LOG_ERROR("SWJ-DP STICKY ERROR"); - + /* Clear Sticky Error Bits */ scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT, DPAP_WRITE, swjdp->dp_ctrl_stat | SSTICKYORUN | SSTICKYERR, NULL); scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); - jtag_execute_queue(); + if ((retval=jtag_execute_queue())!=ERROR_OK) + return retval; LOG_DEBUG("swjdp: status 0x%x", ctrlstat); - - /* Can we find out the reason for the error ?? */ + + /* Can we find out the reason for the error ?? */ ahbap_read_system_atomic_u32(swjdp, DCB_DHCSR, &dcb_dhcsr); ahbap_read_system_atomic_u32(swjdp, NVIC_SHCSR, &nvic_shcsr); ahbap_read_system_atomic_u32(swjdp, NVIC_CFSR, &nvic_cfsr); ahbap_read_system_atomic_u32(swjdp, NVIC_BFAR, &nvic_bfar); LOG_ERROR("dcb_dhcsr 0x%x, nvic_shcsr 0x%x, nvic_cfsr 0x%x, nvic_bfar 0x%x", dcb_dhcsr, nvic_shcsr, nvic_cfsr, nvic_bfar); } - jtag_execute_queue(); + if ((retval=jtag_execute_queue())!=ERROR_OK) + return retval; return ERROR_JTAG_DEVICE_ERROR; } @@ -290,7 +321,7 @@ int ahbap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, u8 *in_value_buf) int ahbap_write_reg_u32(swjdp_common_t *swjdp, u32 reg_addr, u32 value) { u8 out_value_buf[4]; - + buf_set_u32(out_value_buf, 0, 32, value); swjdp_bankselect_apacc(swjdp, reg_addr); scan_inout_check(swjdp, SWJDP_IR_APACC, reg_addr, DPAP_WRITE, out_value_buf, NULL); @@ -328,7 +359,7 @@ int ahbap_setup_accessport(swjdp_common_t *swjdp, u32 csw, u32 tar) swjdp->ap_tar_value = tar; } if (csw & CSW_ADDRINC_MASK) - { + { /* Do not cache TAR value when autoincrementing */ swjdp->ap_tar_value = -1; } @@ -349,14 +380,14 @@ int ahbap_read_system_u32(swjdp_common_t *swjdp, u32 address, u32 *value) ahbap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_OFF, address & 0xFFFFFFF0); ahbap_read_reg_u32(swjdp, AHBAP_BD0 | (address & 0xC), value ); - + return ERROR_OK; } int ahbap_read_system_atomic_u32(swjdp_common_t *swjdp, u32 address, u32 *value) { ahbap_read_system_u32(swjdp, address, value); - + return swjdp_transaction_endcheck(swjdp); } @@ -380,7 +411,7 @@ int ahbap_write_system_u32(swjdp_common_t *swjdp, u32 address, u32 value) int ahbap_write_system_atomic_u32(swjdp_common_t *swjdp, u32 address, u32 value) { ahbap_write_system_u32(swjdp, address, value); - + return swjdp_transaction_endcheck(swjdp); } @@ -397,12 +428,12 @@ int ahbap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres int wcount, blocksize, writecount, errorcount = 0, retval = ERROR_OK; u32 adr = address; u8* pBuffer = buffer; - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; - + count >>= 2; wcount = count; - + /* if we have an unaligned access - reorder data */ if (adr & 0x3u) { @@ -410,7 +441,7 @@ int ahbap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres { int i; outvalue = *((u32*)pBuffer); - + for (i = 0; i < 4; i++ ) { *((u8*)pBuffer + (adr & 0x3)) = outvalue; @@ -420,25 +451,25 @@ int ahbap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres pBuffer += 4; } } - + while (wcount > 0) { /* Adjust to write blocks within 4K aligned boundaries */ blocksize = (0x1000 - (0xFFF & address)) >> 2; if (wcount < blocksize) blocksize = wcount; - + /* handle unaligned data at 4k boundary */ if (blocksize == 0) blocksize = 1; - + ahbap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_SINGLE, address); - + for (writecount = 0; writecount < blocksize; writecount++) { ahbap_write_reg(swjdp, AHBAP_DRW, buffer + 4 * writecount ); } - + if (swjdp_transaction_endcheck(swjdp) == ERROR_OK) { wcount = wcount - blocksize; @@ -449,14 +480,14 @@ int ahbap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres { errorcount++; } - + if (errorcount > 1) { LOG_WARNING("Block write error address 0x%x, wcount 0x%x", address, wcount); return ERROR_JTAG_DEVICE_ERROR; } } - + return retval; } @@ -465,32 +496,32 @@ int ahbap_write_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 u32 outvalue; int retval = ERROR_OK; int wcount, blocksize, writecount, i; - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; - + wcount = count >> 1; - + while (wcount > 0) { int nbytes; - + /* Adjust to read within 4K block boundaries */ blocksize = (0x1000 - (0xFFF & address)) >> 1; - + if (wcount < blocksize) blocksize = wcount; - + /* handle unaligned data at 4k boundary */ if (blocksize == 0) blocksize = 1; - + ahbap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_PACKED, address); writecount = blocksize; - + do { nbytes = MIN((writecount << 1), 4); - + if (nbytes < 4 ) { if (ahbap_write_buf_u16(swjdp, buffer, nbytes, address) != ERROR_OK) @@ -498,20 +529,20 @@ int ahbap_write_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count); return ERROR_JTAG_DEVICE_ERROR; } - + address += nbytes >> 1; } else { outvalue = *((u32*)buffer); - + for (i = 0; i < nbytes; i++ ) { *((u8*)buffer + (address & 0x3)) = outvalue; outvalue >>= 8; address++; } - + outvalue = *((u32*)buffer); ahbap_write_reg_u32(swjdp, AHBAP_DRW, outvalue); if (swjdp_transaction_endcheck(swjdp) != ERROR_OK) @@ -520,14 +551,14 @@ int ahbap_write_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 return ERROR_JTAG_DEVICE_ERROR; } } - + buffer += nbytes >> 1; writecount -= nbytes >> 1; - + } while (writecount); wcount -= blocksize; } - + return retval; } @@ -535,12 +566,12 @@ int ahbap_write_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres { u32 outvalue; int retval = ERROR_OK; - + if (count >= 4) return ahbap_write_buf_packed_u16(swjdp, buffer, count, address); - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; - + while (count > 0) { ahbap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_SINGLE, address); @@ -560,28 +591,28 @@ int ahbap_write_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 u32 outvalue; int retval = ERROR_OK; int wcount, blocksize, writecount, i; - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; - + wcount = count; - + while (wcount > 0) { int nbytes; - + /* Adjust to read within 4K block boundaries */ blocksize = (0x1000 - (0xFFF & address)); - + if (wcount < blocksize) blocksize = wcount; - + ahbap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_PACKED, address); writecount = blocksize; - + do { nbytes = MIN(writecount, 4); - + if (nbytes < 4 ) { if (ahbap_write_buf_u8(swjdp, buffer, nbytes, address) != ERROR_OK) @@ -589,20 +620,20 @@ int ahbap_write_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count); return ERROR_JTAG_DEVICE_ERROR; } - + address += nbytes; } else { outvalue = *((u32*)buffer); - + for (i = 0; i < nbytes; i++ ) { *((u8*)buffer + (address & 0x3)) = outvalue; outvalue >>= 8; address++; } - + outvalue = *((u32*)buffer); ahbap_write_reg_u32(swjdp, AHBAP_DRW, outvalue); if (swjdp_transaction_endcheck(swjdp) != ERROR_OK) @@ -611,14 +642,14 @@ int ahbap_write_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 return ERROR_JTAG_DEVICE_ERROR; } } - + buffer += nbytes; writecount -= nbytes; - + } while (writecount); wcount -= blocksize; } - + return retval; } @@ -626,12 +657,12 @@ int ahbap_write_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address { u32 outvalue; int retval = ERROR_OK; - + if (count >= 4) return ahbap_write_buf_packed_u8(swjdp, buffer, count, address); - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; - + while (count > 0) { ahbap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_SINGLE, address); @@ -642,7 +673,7 @@ int ahbap_write_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address address++; buffer++; } - + return retval; } @@ -658,25 +689,25 @@ int ahbap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address int wcount, blocksize, readcount, errorcount = 0, retval = ERROR_OK; u32 adr = address; u8* pBuffer = buffer; - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; - + count >>= 2; wcount = count; - + while (wcount > 0) { /* Adjust to read within 4K block boundaries */ blocksize = (0x1000 - (0xFFF & address)) >> 2; if (wcount < blocksize) blocksize = wcount; - + /* handle unaligned data at 4k boundary */ if (blocksize == 0) blocksize = 1; - + ahbap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_SINGLE, address); - + /* Scan out first read */ swjdp_scan(swjdp->jtag_info, SWJDP_IR_APACC, AHBAP_DRW, DPAP_READ, 0, NULL, NULL); for (readcount = 0; readcount < blocksize - 1; readcount++) @@ -684,27 +715,27 @@ int ahbap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address /* Scan out read instruction and scan in previous value */ swjdp_scan(swjdp->jtag_info, SWJDP_IR_APACC, AHBAP_DRW, DPAP_READ, 0, buffer + 4 * readcount, &swjdp->ack); } - + /* Scan in last value */ swjdp_scan(swjdp->jtag_info, SWJDP_IR_DPACC, DP_RDBUFF, DPAP_READ, 0, buffer + 4 * readcount, &swjdp->ack); if (swjdp_transaction_endcheck(swjdp) == ERROR_OK) { wcount = wcount - blocksize; address += 4 * blocksize; - buffer += 4 * blocksize; + buffer += 4 * blocksize; } else { errorcount++; } - + if (errorcount > 1) { LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count); return ERROR_JTAG_DEVICE_ERROR; } } - + /* if we have an unaligned access - reorder data */ if (adr & 0x3u) { @@ -712,7 +743,7 @@ int ahbap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address { int i; u32 data = *((u32*)pBuffer); - + for (i = 0; i < 4; i++ ) { *((u8*)pBuffer) = (data >> 8 * (adr & 0x3)); @@ -721,7 +752,7 @@ int ahbap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address } } } - + return retval; } @@ -730,27 +761,27 @@ int ahbap_read_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 u32 invalue; int retval = ERROR_OK; int wcount, blocksize, readcount, i; - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; - + wcount = count >> 1; - + while (wcount > 0) { int nbytes; - + /* Adjust to read within 4K block boundaries */ blocksize = (0x1000 - (0xFFF & address)) >> 1; if (wcount < blocksize) blocksize = wcount; - + ahbap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_PACKED, address); - + /* handle unaligned data at 4k boundary */ if (blocksize == 0) blocksize = 1; readcount = blocksize; - + do { ahbap_read_reg_u32(swjdp, AHBAP_DRW, &invalue ); @@ -759,21 +790,21 @@ int ahbap_read_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count); return ERROR_JTAG_DEVICE_ERROR; } - + nbytes = MIN((readcount << 1), 4); - + for (i = 0; i < nbytes; i++ ) { *((u8*)buffer) = (invalue >> 8 * (address & 0x3)); buffer++; address++; } - + readcount -= (nbytes >> 1); } while (readcount); wcount -= blocksize; } - + return retval; } @@ -781,12 +812,12 @@ int ahbap_read_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address { u32 invalue, i; int retval = ERROR_OK; - + if (count >= 4) return ahbap_read_buf_packed_u16(swjdp, buffer, count, address); - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; - + while (count > 0) { ahbap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_SINGLE, address); @@ -818,24 +849,24 @@ int ahbap_read_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 a u32 invalue; int retval = ERROR_OK; int wcount, blocksize, readcount, i; - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; - + wcount = count; - + while (wcount > 0) { int nbytes; - + /* Adjust to read within 4K block boundaries */ blocksize = (0x1000 - (0xFFF & address)); - + if (wcount < blocksize) blocksize = wcount; - + ahbap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_PACKED, address); readcount = blocksize; - + do { ahbap_read_reg_u32(swjdp, AHBAP_DRW, &invalue ); @@ -844,21 +875,21 @@ int ahbap_read_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 a LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count); return ERROR_JTAG_DEVICE_ERROR; } - + nbytes = MIN(readcount, 4); - + for (i = 0; i < nbytes; i++ ) { *((u8*)buffer) = (invalue >> 8 * (address & 0x3)); buffer++; address++; } - + readcount -= nbytes; } while (readcount); wcount -= blocksize; } - + return retval; } @@ -866,12 +897,12 @@ int ahbap_read_buf_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address) { u32 invalue; int retval = ERROR_OK; - + if (count >= 4) return ahbap_read_buf_packed_u8(swjdp, buffer, count, address); - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; - + while (count > 0) { ahbap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_SINGLE, address); @@ -890,12 +921,12 @@ int ahbap_read_coreregister_u32(swjdp_common_t *swjdp, u32 *value, int regnum) { int retval; u32 dcrdr; - + /* because the DCB_DCRDR is used for the emulated dcc channel * we gave to save/restore the DCB_DCRDR when used */ - + ahbap_read_system_atomic_u32(swjdp, DCB_DCRDR, &dcrdr); - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; /* ahbap_write_system_u32(swjdp, DCB_DCRSR, regnum); */ @@ -905,7 +936,7 @@ int ahbap_read_coreregister_u32(swjdp_common_t *swjdp, u32 *value, int regnum) /* ahbap_read_system_u32(swjdp, DCB_DCRDR, value); */ ahbap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_OFF, DCB_DCRDR & 0xFFFFFFF0); ahbap_read_reg_u32(swjdp, AHBAP_BD0 | (DCB_DCRDR & 0xC), value ); - + retval = swjdp_transaction_endcheck(swjdp); ahbap_write_system_atomic_u32(swjdp, DCB_DCRDR, dcrdr); return retval; @@ -915,14 +946,14 @@ int ahbap_write_coreregister_u32(swjdp_common_t *swjdp, u32 value, int regnum) { int retval; u32 dcrdr; - + /* because the DCB_DCRDR is used for the emulated dcc channel * we gave to save/restore the DCB_DCRDR when used */ - + ahbap_read_system_atomic_u32(swjdp, DCB_DCRDR, &dcrdr); - + swjdp->trans_mode = TRANS_MODE_COMPOSITE; - + /* ahbap_write_system_u32(swjdp, DCB_DCRDR, core_regs[i]); */ ahbap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_OFF, DCB_DCRDR & 0xFFFFFFF0); ahbap_write_reg_u32(swjdp, AHBAP_BD0 | (DCB_DCRDR & 0xC), value ); @@ -930,7 +961,7 @@ int ahbap_write_coreregister_u32(swjdp_common_t *swjdp, u32 value, int regnum) /* ahbap_write_system_u32(swjdp, DCB_DCRSR, i | DCRSR_WnR ); */ ahbap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_OFF, DCB_DCRSR & 0xFFFFFFF0); ahbap_write_reg_u32(swjdp, AHBAP_BD0 | (DCB_DCRSR & 0xC), regnum | DCRSR_WnR ); - + retval = swjdp_transaction_endcheck(swjdp); ahbap_write_system_atomic_u32(swjdp, DCB_DCRDR, dcrdr); return retval; @@ -942,16 +973,16 @@ int ahbap_debugport_init(swjdp_common_t *swjdp) u32 ctrlstat; int cnt = 0; int retval; - + LOG_DEBUG(" "); - + swjdp->ap_csw_value = -1; swjdp->ap_tar_value = -1; swjdp->trans_mode = TRANS_MODE_ATOMIC; swjdp_read_dpacc(swjdp, &dummy, DP_CTRL_STAT); swjdp_write_dpacc(swjdp, SSTICKYERR, DP_CTRL_STAT); swjdp_read_dpacc(swjdp, &dummy, DP_CTRL_STAT); - + swjdp->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ; swjdp_write_dpacc(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT); @@ -966,7 +997,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp) swjdp_read_dpacc(swjdp, &ctrlstat, DP_CTRL_STAT); if ((retval=jtag_execute_queue())!=ERROR_OK) return retval; - usleep(10000); + alive_sleep(10); } while (!(ctrlstat & CSYSPWRUPACK) && (cnt++ < 10)) @@ -975,7 +1006,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp) swjdp_read_dpacc(swjdp, &ctrlstat, DP_CTRL_STAT); if ((retval=jtag_execute_queue())!=ERROR_OK) return retval; - usleep(10000); + alive_sleep(10); } swjdp_read_dpacc(swjdp, &dummy, DP_CTRL_STAT); @@ -983,11 +1014,11 @@ int ahbap_debugport_init(swjdp_common_t *swjdp) swjdp->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ | CORUNDETECT; swjdp_write_dpacc(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT); swjdp_read_dpacc(swjdp, &dummy, DP_CTRL_STAT); - + ahbap_read_reg_u32(swjdp, 0xFC, &idreg); ahbap_read_reg_u32(swjdp, 0xF8, &romaddr); - + LOG_DEBUG("AHB-AP ID Register 0x%x, Debug ROM Address 0x%x", idreg, romaddr); - + return ERROR_OK; }