X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fembeddedice.h;h=39902fb3ec920add7511768ceed9f22a7b618e22;hp=1faa1eeba620f87356d76251b7add24988eca708;hb=b61e454869c988e7fafc1c16982ccfec04415b51;hpb=9e3136a5f84a402ae9f5c9e24a1e6c2a7451aac3 diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h index 1faa1eeba6..39902fb3ec 100644 --- a/src/target/embeddedice.h +++ b/src/target/embeddedice.h @@ -19,17 +19,15 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * along with this program. If not, see . * ***************************************************************************/ -#ifndef EMBEDDED_ICE_H -#define EMBEDDED_ICE_H -#include +#ifndef OPENOCD_TARGET_EMBEDDEDICE_H +#define OPENOCD_TARGET_EMBEDDEDICE_H -enum -{ +#include "arm7_9_common.h" + +enum { EICE_DBG_CTRL = 0, EICE_DBG_STAT = 1, EICE_COMMS_CTRL = 2, @@ -49,8 +47,7 @@ enum EICE_VEC_CATCH = 16 }; -enum -{ +enum { EICE_DBG_CONTROL_ICEDIS = 5, EICE_DBG_CONTROL_MONEN = 4, EICE_DBG_CONTROL_INTDIS = 2, @@ -58,8 +55,7 @@ enum EICE_DBG_CONTROL_DBGACK = 0, }; -enum -{ +enum { EICE_DBG_STATUS_IJBIT = 5, EICE_DBG_STATUS_ITBIT = 4, EICE_DBG_STATUS_SYSCOMP = 3, @@ -68,8 +64,7 @@ enum EICE_DBG_STATUS_DBGACK = 0 }; -enum -{ +enum { EICE_W_CTRL_ENABLE = 0x100, EICE_W_CTRL_RANGE = 0x80, EICE_W_CTRL_CHAIN = 0x40, @@ -81,57 +76,53 @@ enum EICE_W_CTRL_nRW = 0x1 }; -enum -{ +enum { EICE_COMM_CTRL_WBIT = 1, EICE_COMM_CTRL_RBIT = 0 }; -struct embeddedice_reg -{ +struct embeddedice_reg { int addr; struct arm_jtag *jtag_info; }; -struct reg_cache* embeddedice_build_reg_cache(struct target *target, +struct reg_cache *embeddedice_build_reg_cache(struct target *target, struct arm7_9_common *arm7_9); int embeddedice_setup(struct target *target); int embeddedice_read_reg(struct reg *reg); int embeddedice_read_reg_w_check(struct reg *reg, - uint8_t* check_value, uint8_t* check_mask); + uint8_t *check_value, uint8_t *check_mask); void embeddedice_write_reg(struct reg *reg, uint32_t value); void embeddedice_store_reg(struct reg *reg); void embeddedice_set_reg(struct reg *reg, uint32_t value); -int embeddedice_set_reg_w_exec(struct reg *reg, uint8_t *buf); int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size); int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size); int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout); -/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of - * embeddedice_write_reg +/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be + * this faster version of embeddedice_write_reg */ -static __inline__ void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value) +static inline void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value) { - static const int embeddedice_num_bits[]={32,5,1}; - uint32_t values[3]; - - values[0]=value; - values[1]=reg_addr; - values[2]=1; - - jtag_add_dr_out(tap, - 3, - embeddedice_num_bits, - values, - jtag_get_end_state()); + uint8_t out_reg_addr = (1 << 5) | reg_addr; + uint8_t out_value[4]; + buf_set_u32(out_value, 0, 32, value); + + struct scan_field fields[2] = { + { .num_bits = 32, .out_value = out_value }, + { .num_bits = 6, .out_value = &out_reg_addr }, + }; + + jtag_add_dr_scan(tap, 2, fields, TAP_IDLE); } -void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count); +void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, const uint8_t *buffer, + int little, int count); -#endif /* EMBEDDED_ICE_H */ +#endif /* OPENOCD_TARGET_EMBEDDEDICE_H */