X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fembeddedice.h;h=cd48ce69713f457475d9e7f070afd4c07bf940f3;hp=8452fc33767a59c9bb00a4311fcf7a9528ef837d;hb=4960c9018f2560b11ede91cde8a68dc56c690159;hpb=c688c1cf48f6cdd0b104d8cff0a1708aa16466a3

diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index 8452fc3376..cd48ce6971 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -2,6 +2,12 @@
  *   Copyright (C) 2005, 2006 by Dominic Rath                              *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
+ *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
+ *   oyvind.harboe@zylin.com                                               *
+ *                                                                         *
+ *   Copyright (C) 2008 by Spencer Oliver                                  *
+ *   spen@spen-soft.co.uk                                                  *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -20,9 +26,6 @@
 #ifndef EMBEDDED_ICE_H
 #define EMBEDDED_ICE_H
 
-#include "target.h"
-#include "register.h"
-#include "arm_jtag.h"
 #include "arm7_9_common.h"
 
 enum
@@ -49,7 +52,7 @@ enum
 enum
 {
 	EICE_DBG_CONTROL_ICEDIS = 5,
-	EICE_DBG_CONTROL_MONEN = 4,	
+	EICE_DBG_CONTROL_MONEN = 4,
 	EICE_DBG_CONTROL_INTDIS = 2,
 	EICE_DBG_CONTROL_DBGRQ = 1,
 	EICE_DBG_CONTROL_DBGACK = 0,
@@ -84,88 +87,50 @@ enum
 	EICE_COMM_CTRL_RBIT = 0
 };
 
-typedef struct embeddedice_reg_s
+struct embeddedice_reg
 {
 	int addr;
-	arm_jtag_t *jtag_info;
-} embeddedice_reg_t;
-
-extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
-extern int embeddedice_setup(target_t *target);
-extern int embeddedice_read_reg(reg_t *reg);
-extern int embeddedice_write_reg(reg_t *reg, u32 value);
-extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
-extern int embeddedice_store_reg(reg_t *reg);
-extern int embeddedice_set_reg(reg_t *reg, u32 value);
-extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf);
-extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size);
-extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size);
-extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
-
-/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of 
+	struct arm_jtag *jtag_info;
+};
+
+struct reg_cache* embeddedice_build_reg_cache(struct target *target,
+		struct arm7_9_common *arm7_9);
+
+int embeddedice_setup(struct target *target);
+
+int embeddedice_read_reg(struct reg *reg);
+int embeddedice_read_reg_w_check(struct reg *reg,
+		uint8_t* check_value, uint8_t* check_mask);
+
+void embeddedice_write_reg(struct reg *reg, uint32_t value);
+void embeddedice_store_reg(struct reg *reg);
+
+void embeddedice_set_reg(struct reg *reg, uint32_t value);
+int embeddedice_set_reg_w_exec(struct reg *reg, uint8_t *buf);
+
+int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size);
+int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size);
+
+int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout);
+
+/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
  * embeddedice_write_reg
  */
-static __inline__ void embeddedice_write_reg_inner(int chain_pos, int reg_addr, u32 value)
+static __inline__ void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value)
 {
-#if 1
-	u32 values[3];
-	int num_bits[3];
-	
-	values[0]=value;
-	num_bits[0]=32;
-	values[1]=reg_addr;
-	num_bits[1]=5;
-	values[2]=1;
-	num_bits[2]=1;
-	
-	jtag_add_dr_out(chain_pos, 
-			3,
-			num_bits,
+	static const int embeddedice_num_bits[] = {32, 6};
+	uint32_t values[2];
+
+	values[0] = value;
+	values[1] = (1 << 5) | reg_addr;
+
+	jtag_add_dr_out(tap,
+			2,
+			embeddedice_num_bits,
 			values,
-			-1);
-#else
-	scan_field_t fields[3];
-	u8 field0_out[4];
-	u8 field1_out[1];
-	u8 field2_out[1];
-
-	fields[0].device = ice_reg->jtag_info->chain_pos;
-	fields[0].num_bits = 32;
-	fields[0].out_value = field0_out;
-	buf_set_u32(fields[0].out_value, 0, 32, value);
-	fields[0].out_mask = NULL;
-	fields[0].in_value = NULL;
-	fields[0].in_check_value = NULL;
-	fields[0].in_check_mask = NULL;
-	fields[0].in_handler = NULL;
-	fields[0].in_handler_priv = NULL;
-	
-	fields[1].device = ice_reg->jtag_info->chain_pos;
-	fields[1].num_bits = 5;
-	fields[1].out_value = field1_out;
-	buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
-	fields[1].out_mask = NULL;
-	fields[1].in_value = NULL;
-	fields[1].in_check_value = NULL;
-	fields[1].in_check_mask = NULL;
-	fields[1].in_handler = NULL;
-	fields[1].in_handler_priv = NULL;
-
-	fields[2].device = ice_reg->jtag_info->chain_pos;
-	fields[2].num_bits = 1;
-	fields[2].out_value = field2_out;
-	buf_set_u32(fields[2].out_value, 0, 1, 1);
-	fields[2].out_mask = NULL;
-	fields[2].in_value = NULL;
-	fields[2].in_check_value = NULL;
-	fields[2].in_check_mask = NULL;
-	fields[2].in_handler = NULL;
-	fields[2].in_handler_priv = NULL;
-	
-	jtag_add_dr_scan(3, fields, -1);
-	
-#endif
+			jtag_get_end_state());
 }
 
+void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count);
 
 #endif /* EMBEDDED_ICE_H */