X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fembeddedice.h;h=f110e82e603d57408d46d2347d3c45da349b0770;hp=4fdadfb7e52529b6c948d71a1a319809a080e080;hb=ed085f379e3fb53cce4d788d5b18cc5a7dcba026;hpb=f133158175b568b9355e1bb3da159fd235723dec

diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index 4fdadfb7e5..f110e82e60 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -2,7 +2,7 @@
  *   Copyright (C) 2005, 2006 by Dominic Rath                              *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
- *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
+ *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
  *   oyvind.harboe@zylin.com                                               *
  *                                                                         *
  *   Copyright (C) 2008 by Spencer Oliver                                  *
@@ -21,15 +21,15 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  ***************************************************************************/
+
 #ifndef EMBEDDED_ICE_H
 #define EMBEDDED_ICE_H
 
 #include "arm7_9_common.h"
 
-enum
-{
+enum {
 	EICE_DBG_CTRL = 0,
 	EICE_DBG_STAT = 1,
 	EICE_COMMS_CTRL = 2,
@@ -49,8 +49,7 @@ enum
 	EICE_VEC_CATCH = 16
 };
 
-enum
-{
+enum {
 	EICE_DBG_CONTROL_ICEDIS = 5,
 	EICE_DBG_CONTROL_MONEN = 4,
 	EICE_DBG_CONTROL_INTDIS = 2,
@@ -58,8 +57,7 @@ enum
 	EICE_DBG_CONTROL_DBGACK = 0,
 };
 
-enum
-{
+enum {
 	EICE_DBG_STATUS_IJBIT = 5,
 	EICE_DBG_STATUS_ITBIT = 4,
 	EICE_DBG_STATUS_SYSCOMP = 3,
@@ -68,8 +66,7 @@ enum
 	EICE_DBG_STATUS_DBGACK = 0
 };
 
-enum
-{
+enum {
 	EICE_W_CTRL_ENABLE = 0x100,
 	EICE_W_CTRL_RANGE = 0x80,
 	EICE_W_CTRL_CHAIN = 0x40,
@@ -81,49 +78,53 @@ enum
 	EICE_W_CTRL_nRW = 0x1
 };
 
-enum
-{
+enum {
 	EICE_COMM_CTRL_WBIT = 1,
 	EICE_COMM_CTRL_RBIT = 0
 };
 
-typedef struct embeddedice_reg_s
-{
+struct embeddedice_reg {
 	int addr;
-	arm_jtag_t *jtag_info;
-} embeddedice_reg_t;
-
-extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
-extern int embeddedice_setup(target_t *target);
-extern int embeddedice_read_reg(reg_t *reg);
-extern void embeddedice_write_reg(reg_t *reg, u32 value);
-extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
-extern void embeddedice_store_reg(reg_t *reg);
-extern void embeddedice_set_reg(reg_t *reg, u32 value);
-extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf);
-extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size);
-extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size);
-extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
-
-/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
- * embeddedice_write_reg
+	struct arm_jtag *jtag_info;
+};
+
+struct reg_cache *embeddedice_build_reg_cache(struct target *target,
+		struct arm7_9_common *arm7_9);
+
+int embeddedice_setup(struct target *target);
+
+int embeddedice_read_reg(struct reg *reg);
+int embeddedice_read_reg_w_check(struct reg *reg,
+		uint8_t *check_value, uint8_t *check_mask);
+
+void embeddedice_write_reg(struct reg *reg, uint32_t value);
+void embeddedice_store_reg(struct reg *reg);
+
+void embeddedice_set_reg(struct reg *reg, uint32_t value);
+
+int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size);
+int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size);
+
+int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout);
+
+/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be
+ * this faster version of embeddedice_write_reg
  */
-static __inline__ void embeddedice_write_reg_inner( jtag_tap_t *tap, int reg_addr, u32 value)
+static inline void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value)
 {
-	static const int embeddedice_num_bits[]={32,5,1};
-	u32 values[3];
-
-	values[0]=value;
-	values[1]=reg_addr;
-	values[2]=1;
-
-	jtag_add_dr_out( tap,
-			3,
-			embeddedice_num_bits,
-			values,
-			jtag_get_end_state());
+	uint8_t out_reg_addr = (1 << 5) | reg_addr;
+	uint8_t out_value[4];
+	buf_set_u32(out_value, 0, 32, value);
+
+	struct scan_field fields[2] = {
+			{ .num_bits = 32, .out_value = out_value },
+			{ .num_bits = 6, .out_value = &out_reg_addr },
+	};
+
+	jtag_add_dr_scan(tap, 2, fields, TAP_IDLE);
 }
 
-void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count);
+void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, const uint8_t *buffer,
+		int little, int count);
 
 #endif /* EMBEDDED_ICE_H */