X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fembeddedice.h;h=f110e82e603d57408d46d2347d3c45da349b0770;hp=eedc21912fbea20941d3681dafb929874a520404;hb=cdd8928a560252e3c7f11911864fe01a1864a0bf;hpb=a582e9a8d183c56d1aa8ae18afc1c11e2cbd6d2d diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h index eedc21912f..f110e82e60 100644 --- a/src/target/embeddedice.h +++ b/src/target/embeddedice.h @@ -1,7 +1,13 @@ /*************************************************************************** - * Copyright (C) 2005, 2006 by Dominic Rath * + * Copyright (C) 2005, 2006 by Dominic Rath * * Dominic.Rath@gmx.de * * * + * Copyright (C) 2007,2008 Øyvind Harboe * + * oyvind.harboe@zylin.com * + * * + * Copyright (C) 2008 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -15,17 +21,15 @@ * You should have received a copy of the GNU General Public License * * along with this program; if not, write to the * * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * ***************************************************************************/ + #ifndef EMBEDDED_ICE_H #define EMBEDDED_ICE_H -#include "target.h" -#include "register.h" -#include "arm_jtag.h" +#include "arm7_9_common.h" -enum -{ +enum { EICE_DBG_CTRL = 0, EICE_DBG_STAT = 1, EICE_COMMS_CTRL = 2, @@ -42,21 +46,19 @@ enum EICE_W1_DATA_MASK = 13, EICE_W1_CONTROL_VALUE = 14, EICE_W1_CONTROL_MASK = 15, - EICE_ABT_STATUS = 16, EICE_VEC_CATCH = 16 }; -enum -{ +enum { EICE_DBG_CONTROL_ICEDIS = 5, - EICE_DBG_CONTROL_MONEN = 4, + EICE_DBG_CONTROL_MONEN = 4, EICE_DBG_CONTROL_INTDIS = 2, EICE_DBG_CONTROL_DBGRQ = 1, EICE_DBG_CONTROL_DBGACK = 0, }; -enum -{ +enum { + EICE_DBG_STATUS_IJBIT = 5, EICE_DBG_STATUS_ITBIT = 4, EICE_DBG_STATUS_SYSCOMP = 3, EICE_DBG_STATUS_IFEN = 2, @@ -64,8 +66,7 @@ enum EICE_DBG_STATUS_DBGACK = 0 }; -enum -{ +enum { EICE_W_CTRL_ENABLE = 0x100, EICE_W_CTRL_RANGE = 0x80, EICE_W_CTRL_CHAIN = 0x40, @@ -77,24 +78,53 @@ enum EICE_W_CTRL_nRW = 0x1 }; -enum -{ +enum { EICE_COMM_CTRL_WBIT = 1, EICE_COMM_CTRL_RBIT = 0 }; -typedef struct embeddedice_reg_s -{ +struct embeddedice_reg { int addr; - arm_jtag_t *jtag_info; -} embeddedice_reg_t; - -extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, int extra_reg); -extern int embeddedice_read_reg(reg_t *reg); -extern int embeddedice_write_reg(reg_t *reg, u32 value); -extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask); -extern int embeddedice_store_reg(reg_t *reg); -extern int embeddedice_set_reg(reg_t *reg, u32 value); -extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf); + struct arm_jtag *jtag_info; +}; + +struct reg_cache *embeddedice_build_reg_cache(struct target *target, + struct arm7_9_common *arm7_9); + +int embeddedice_setup(struct target *target); + +int embeddedice_read_reg(struct reg *reg); +int embeddedice_read_reg_w_check(struct reg *reg, + uint8_t *check_value, uint8_t *check_mask); + +void embeddedice_write_reg(struct reg *reg, uint32_t value); +void embeddedice_store_reg(struct reg *reg); + +void embeddedice_set_reg(struct reg *reg, uint32_t value); + +int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size); +int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size); + +int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout); + +/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be + * this faster version of embeddedice_write_reg + */ +static inline void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value) +{ + uint8_t out_reg_addr = (1 << 5) | reg_addr; + uint8_t out_value[4]; + buf_set_u32(out_value, 0, 32, value); + + struct scan_field fields[2] = { + { .num_bits = 32, .out_value = out_value }, + { .num_bits = 6, .out_value = &out_reg_addr }, + }; + + jtag_add_dr_scan(tap, 2, fields, TAP_IDLE); +} + +void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, const uint8_t *buffer, + int little, int count); #endif /* EMBEDDED_ICE_H */