X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fetb.c;h=41312bedd381dbbebbbdbfd9fd1c9f93baf5d589;hp=da71afdc8af5bbb153d8ea98e5b7d6387e85cd97;hb=39ab1c1a41cf6adfaeb936931a771e6b2d5fbdcb;hpb=86173cdbddde781b19ac630602f2d450a59b32b5 diff --git a/src/target/etb.c b/src/target/etb.c index da71afdc8a..41312bedd3 100644 --- a/src/target/etb.c +++ b/src/target/etb.c @@ -42,14 +42,12 @@ static int etb_reg_arch_type = -1; static int etb_get_reg(reg_t *reg); -static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); - -static int etb_set_instr(etb_t *etb, u32 new_instr) +static int etb_set_instr(etb_t *etb, uint32_t new_instr) { jtag_tap_t *tap; tap = etb->tap; - if (tap==NULL) + if (tap == NULL) return ERROR_FAIL; if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) @@ -71,7 +69,7 @@ static int etb_set_instr(etb_t *etb, u32 new_instr) return ERROR_OK; } -static int etb_scann(etb_t *etb, u32 new_scan_chain) +static int etb_scann(etb_t *etb, uint32_t new_scan_chain) { if (etb->cur_scan_chain != new_scan_chain) { @@ -96,6 +94,33 @@ static int etb_scann(etb_t *etb, u32 new_scan_chain) return ERROR_OK; } +static int etb_read_reg_w_check(reg_t *, uint8_t *, uint8_t *); +static int etb_set_reg_w_exec(reg_t *, uint8_t *); + +static int etb_read_reg(reg_t *reg) +{ + return etb_read_reg_w_check(reg, NULL, NULL); +} + +static int etb_get_reg(reg_t *reg) +{ + int retval; + + if ((retval = etb_read_reg(reg)) != ERROR_OK) + { + LOG_ERROR("BUG: error scheduling ETB register read"); + return retval; + } + + if ((retval = jtag_execute_queue()) != ERROR_OK) + { + LOG_ERROR("ETB register read failed"); + return retval; + } + + return ERROR_OK; +} + reg_cache_t* etb_build_reg_cache(etb_t *etb) { reg_cache_t *reg_cache = malloc(sizeof(reg_cache_t)); @@ -138,33 +163,15 @@ reg_cache_t* etb_build_reg_cache(etb_t *etb) return reg_cache; } -static int etb_get_reg(reg_t *reg) +static void etb_getbuf(jtag_callback_data_t arg) { - int retval; - - if ((retval = etb_read_reg(reg)) != ERROR_OK) - { - LOG_ERROR("BUG: error scheduling etm register read"); - return retval; - } - - if ((retval = jtag_execute_queue()) != ERROR_OK) - { - LOG_ERROR("register read failed"); - return retval; - } - - return ERROR_OK; -} + uint8_t *in = (uint8_t *)arg; - -static void etb_getbuf(uint8_t *in) -{ - *((u32 *)in)=buf_get_u32(in, 0, 32); + *((uint32_t *)in) = buf_get_u32(in, 0, 32); } -static int etb_read_ram(etb_t *etb, u32 *data, int num_frames) +static int etb_read_ram(etb_t *etb, uint32_t *data, int num_frames) { scan_field_t fields[3]; int i; @@ -203,10 +210,10 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames) else buf_set_u32(fields[1].out_value, 0, 7, 0); - fields[0].in_value = (uint8_t *)(data+i); + fields[0].in_value = (uint8_t *)(data + i); jtag_add_dr_scan(3, fields, jtag_get_end_state()); - jtag_add_callback(etb_getbuf, (uint8_t *)(data+i)); + jtag_add_callback(etb_getbuf, (jtag_callback_data_t)(data + i)); } jtag_execute_queue(); @@ -217,13 +224,14 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames) return ERROR_OK; } -int etb_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask) +static int etb_read_reg_w_check(reg_t *reg, + uint8_t* check_value, uint8_t* check_mask) { etb_reg_t *etb_reg = reg->arch_info; uint8_t reg_addr = etb_reg->addr & 0x7f; scan_field_t fields[3]; - LOG_DEBUG("%i", etb_reg->addr); + LOG_DEBUG("%i", (int)(etb_reg->addr)); jtag_set_end_state(TAP_IDLE); etb_scann(etb_reg->etb, 0x0); @@ -270,18 +278,15 @@ int etb_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask) return ERROR_OK; } -int etb_read_reg(reg_t *reg) -{ - return etb_read_reg_w_check(reg, NULL, NULL); -} +static int etb_write_reg(reg_t *, uint32_t); -int etb_set_reg(reg_t *reg, u32 value) +static int etb_set_reg(reg_t *reg, uint32_t value) { int retval; if ((retval = etb_write_reg(reg, value)) != ERROR_OK) { - LOG_ERROR("BUG: error scheduling etm register write"); + LOG_ERROR("BUG: error scheduling ETB register write"); return retval; } @@ -292,7 +297,7 @@ int etb_set_reg(reg_t *reg, u32 value) return ERROR_OK; } -int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf) +static int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf) { int retval; @@ -300,19 +305,19 @@ int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf) if ((retval = jtag_execute_queue()) != ERROR_OK) { - LOG_ERROR("register write failed"); + LOG_ERROR("ETB: register write failed"); return retval; } return ERROR_OK; } -int etb_write_reg(reg_t *reg, u32 value) +static int etb_write_reg(reg_t *reg, uint32_t value) { etb_reg_t *etb_reg = reg->arch_info; uint8_t reg_addr = etb_reg->addr & 0x7f; scan_field_t fields[3]; - LOG_DEBUG("%i: 0x%8.8x", etb_reg->addr, value); + LOG_DEBUG("%i: 0x%8.8" PRIx32 "", (int)(etb_reg->addr), value); jtag_set_end_state(TAP_IDLE); etb_scann(etb_reg->etb, 0x0); @@ -344,22 +349,6 @@ int etb_write_reg(reg_t *reg, u32 value) return ERROR_OK; } -int etb_store_reg(reg_t *reg) -{ - return etb_write_reg(reg, buf_get_u32(reg->value, 0, reg->size)); -} - -static int etb_register_commands(struct command_context_s *cmd_ctx) -{ - command_t *etb_cmd; - - etb_cmd = register_command(cmd_ctx, NULL, "etb", NULL, COMMAND_ANY, "Embedded Trace Buffer"); - - register_command(cmd_ctx, etb_cmd, "config", handle_etb_config_command, COMMAND_CONFIG, NULL); - - return ERROR_OK; -} - static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target; @@ -376,20 +365,20 @@ static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cm if (!target) { - LOG_ERROR("target '%s' not defined", args[0]); + LOG_ERROR("ETB: target '%s' not defined", args[0]); return ERROR_FAIL; } if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK) { - command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target"); + command_print(cmd_ctx, "ETB: current target isn't an ARM7/ARM9 target"); return ERROR_FAIL; } - tap = jtag_tap_by_string( args[1] ); + tap = jtag_tap_by_string(args[1]); if (tap == NULL) { - command_print(cmd_ctx, "Tap: %s does not exist", args[1] ); + command_print(cmd_ctx, "ETB: TAP %s does not exist", args[1]); return ERROR_FAIL; } @@ -407,13 +396,25 @@ static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cm } else { - LOG_ERROR("target has no ETM defined, ETB left unconfigured"); + LOG_ERROR("ETM: target has no ETM defined, ETB left unconfigured"); return ERROR_FAIL; } return ERROR_OK; } +static int etb_register_commands(struct command_context_s *cmd_ctx) +{ + command_t *etb_cmd = register_command(cmd_ctx, NULL, "etb", + NULL, COMMAND_ANY, "Embedded Trace Buffer"); + + register_command(cmd_ctx, etb_cmd, "config", + handle_etb_config_command, COMMAND_CONFIG, + NULL); + + return ERROR_OK; +} + static int etb_init(etm_context_t *etm_ctx) { etb_t *etb = etm_ctx->capture_driver_priv; @@ -434,56 +435,53 @@ static int etb_init(etm_context_t *etm_ctx) static trace_status_t etb_status(etm_context_t *etm_ctx) { etb_t *etb = etm_ctx->capture_driver_priv; + reg_t *control = &etb->reg_cache->reg_list[ETB_CTRL]; + reg_t *status = &etb->reg_cache->reg_list[ETB_STATUS]; + trace_status_t retval = 0; + int etb_timeout = 100; etb->etm_ctx = etm_ctx; - /* if tracing is currently idle, return this information */ - if (etm_ctx->capture_status == TRACE_IDLE) - { - return etm_ctx->capture_status; - } - else if (etm_ctx->capture_status & TRACE_RUNNING) - { - reg_t *etb_status_reg = &etb->reg_cache->reg_list[ETB_STATUS]; - int etb_timeout = 100; + /* read control and status registers */ + etb_read_reg(control); + etb_read_reg(status); + jtag_execute_queue(); - /* trace is running, check the ETB status flags */ - etb_get_reg(etb_status_reg); + /* See if it's (still) active */ + retval = buf_get_u32(control->value, 0, 1) ? TRACE_RUNNING : TRACE_IDLE; - /* check Full bit to identify an overflow */ - if (buf_get_u32(etb_status_reg->value, 0, 1) == 1) - etm_ctx->capture_status |= TRACE_OVERFLOWED; + /* check Full bit to identify wraparound/overflow */ + if (buf_get_u32(status->value, 0, 1) == 1) + retval |= TRACE_OVERFLOWED; - /* check Triggered bit to identify trigger condition */ - if (buf_get_u32(etb_status_reg->value, 1, 1) == 1) - etm_ctx->capture_status |= TRACE_TRIGGERED; + /* check Triggered bit to identify trigger condition */ + if (buf_get_u32(status->value, 1, 1) == 1) + retval |= TRACE_TRIGGERED; - /* check AcqComp to identify trace completion */ - if (buf_get_u32(etb_status_reg->value, 2, 1) == 1) - { - while (etb_timeout-- && (buf_get_u32(etb_status_reg->value, 3, 1) == 0)) - { - /* wait for data formatter idle */ - etb_get_reg(etb_status_reg); - } + /* check AcqComp to see if trigger counter dropped to zero */ + if (buf_get_u32(status->value, 2, 1) == 1) { + /* wait for DFEmpty */ + while (etb_timeout-- && buf_get_u32(status->value, 3, 1) == 0) + etb_get_reg(status); - if (etb_timeout == 0) - { - LOG_ERROR("AcqComp set but DFEmpty won't go high, ETB status: 0x%x", - buf_get_u32(etb_status_reg->value, 0, etb_status_reg->size)); - } + if (etb_timeout == 0) + LOG_ERROR("ETB: DFEmpty won't go high, status 0x%02x", + (unsigned) buf_get_u32(status->value, 0, 4)); - if (!(etm_ctx->capture_status && TRACE_TRIGGERED)) - { - LOG_ERROR("trace completed, but no trigger condition detected"); - } + if (!(etm_ctx->capture_status & TRACE_TRIGGERED)) + LOG_WARNING("ETB: trace complete without triggering?"); - etm_ctx->capture_status &= ~TRACE_RUNNING; - etm_ctx->capture_status |= TRACE_COMPLETED; - } + retval |= TRACE_COMPLETED; } - return etm_ctx->capture_status; + /* NOTE: using a trigger is optional; and at least ETB11 has a mode + * where it can ignore the trigger counter. + */ + + /* update recorded state */ + etm_ctx->capture_status = retval; + + return retval; } static int etb_read_trace(etm_context_t *etm_ctx) @@ -491,7 +489,7 @@ static int etb_read_trace(etm_context_t *etm_ctx) etb_t *etb = etm_ctx->capture_driver_priv; int first_frame = 0; int num_frames = etb->ram_depth; - u32 *trace_data = NULL; + uint32_t *trace_data = NULL; int i, j; etb_read_reg(&etb->reg_cache->reg_list[ETB_STATUS]); @@ -514,7 +512,7 @@ static int etb_read_trace(etm_context_t *etm_ctx) etb_write_reg(&etb->reg_cache->reg_list[ETB_RAM_READ_POINTER], first_frame); /* read data into temporary array for unpacking */ - trace_data = malloc(sizeof(u32) * num_frames); + trace_data = malloc(sizeof(uint32_t) * num_frames); etb_read_ram(etb, trace_data, num_frames); if (etm_ctx->trace_depth > 0) @@ -549,32 +547,32 @@ static int etb_read_trace(etm_context_t *etm_ctx) etm_ctx->trace_data[j].flags |= ETMV1_TRIGGER_CYCLE; } - /* trace word j+1 */ - etm_ctx->trace_data[j+1].pipestat = (trace_data[i] & 0x100) >> 8; - etm_ctx->trace_data[j+1].packet = (trace_data[i] & 0x7800) >> 11; - etm_ctx->trace_data[j+1].flags = 0; + /* trace word j + 1 */ + etm_ctx->trace_data[j + 1].pipestat = (trace_data[i] & 0x100) >> 8; + etm_ctx->trace_data[j + 1].packet = (trace_data[i] & 0x7800) >> 11; + etm_ctx->trace_data[j + 1].flags = 0; if ((trace_data[i] & 0x8000) >> 15) { - etm_ctx->trace_data[j+1].flags |= ETMV1_TRACESYNC_CYCLE; + etm_ctx->trace_data[j + 1].flags |= ETMV1_TRACESYNC_CYCLE; } - if (etm_ctx->trace_data[j+1].pipestat == STAT_TR) + if (etm_ctx->trace_data[j + 1].pipestat == STAT_TR) { - etm_ctx->trace_data[j+1].pipestat = etm_ctx->trace_data[j+1].packet & 0x7; - etm_ctx->trace_data[j+1].flags |= ETMV1_TRIGGER_CYCLE; + etm_ctx->trace_data[j + 1].pipestat = etm_ctx->trace_data[j + 1].packet & 0x7; + etm_ctx->trace_data[j + 1].flags |= ETMV1_TRIGGER_CYCLE; } - /* trace word j+2 */ - etm_ctx->trace_data[j+2].pipestat = (trace_data[i] & 0x10000) >> 16; - etm_ctx->trace_data[j+2].packet = (trace_data[i] & 0x780000) >> 19; - etm_ctx->trace_data[j+2].flags = 0; + /* trace word j + 2 */ + etm_ctx->trace_data[j + 2].pipestat = (trace_data[i] & 0x10000) >> 16; + etm_ctx->trace_data[j + 2].packet = (trace_data[i] & 0x780000) >> 19; + etm_ctx->trace_data[j + 2].flags = 0; if ((trace_data[i] & 0x800000) >> 23) { - etm_ctx->trace_data[j+2].flags |= ETMV1_TRACESYNC_CYCLE; + etm_ctx->trace_data[j + 2].flags |= ETMV1_TRACESYNC_CYCLE; } - if (etm_ctx->trace_data[j+2].pipestat == STAT_TR) + if (etm_ctx->trace_data[j + 2].pipestat == STAT_TR) { - etm_ctx->trace_data[j+2].pipestat = etm_ctx->trace_data[j+2].packet & 0x7; - etm_ctx->trace_data[j+2].flags |= ETMV1_TRIGGER_CYCLE; + etm_ctx->trace_data[j + 2].pipestat = etm_ctx->trace_data[j + 2].packet & 0x7; + etm_ctx->trace_data[j + 2].flags |= ETMV1_TRIGGER_CYCLE; } j += 3; @@ -595,18 +593,18 @@ static int etb_read_trace(etm_context_t *etm_ctx) etm_ctx->trace_data[j].flags |= ETMV1_TRIGGER_CYCLE; } - /* trace word j+1 */ - etm_ctx->trace_data[j+1].pipestat = (trace_data[i] & 0x7000) >> 12; - etm_ctx->trace_data[j+1].packet = (trace_data[i] & 0x7f8000) >> 15; - etm_ctx->trace_data[j+1].flags = 0; + /* trace word j + 1 */ + etm_ctx->trace_data[j + 1].pipestat = (trace_data[i] & 0x7000) >> 12; + etm_ctx->trace_data[j + 1].packet = (trace_data[i] & 0x7f8000) >> 15; + etm_ctx->trace_data[j + 1].flags = 0; if ((trace_data[i] & 0x800000) >> 23) { - etm_ctx->trace_data[j+1].flags |= ETMV1_TRACESYNC_CYCLE; + etm_ctx->trace_data[j + 1].flags |= ETMV1_TRACESYNC_CYCLE; } - if (etm_ctx->trace_data[j+1].pipestat == STAT_TR) + if (etm_ctx->trace_data[j + 1].pipestat == STAT_TR) { - etm_ctx->trace_data[j+1].pipestat = etm_ctx->trace_data[j+1].packet & 0x7; - etm_ctx->trace_data[j+1].flags |= ETMV1_TRIGGER_CYCLE; + etm_ctx->trace_data[j + 1].pipestat = etm_ctx->trace_data[j + 1].packet & 0x7; + etm_ctx->trace_data[j + 1].flags |= ETMV1_TRIGGER_CYCLE; } j += 2; @@ -639,8 +637,8 @@ static int etb_read_trace(etm_context_t *etm_ctx) static int etb_start_capture(etm_context_t *etm_ctx) { etb_t *etb = etm_ctx->capture_driver_priv; - u32 etb_ctrl_value = 0x1; - u32 trigger_count; + uint32_t etb_ctrl_value = 0x1; + uint32_t trigger_count; if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_DEMUXED) { @@ -652,8 +650,10 @@ static int etb_start_capture(etm_context_t *etm_ctx) etb_ctrl_value |= 0x2; } - if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_MUXED) + if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_MUXED) { + LOG_ERROR("ETB: can't run in multiplexed mode"); return ERROR_ETM_PORTMODE_NOT_SUPPORTED; + } trigger_count = (etb->ram_depth * etm_ctx->trigger_percent) / 100;